[llvm] [RISCV][TTI] Enable masked interleave vectorization (PR #150074)

Philip Reames via llvm-commits llvm-commits at lists.llvm.org
Wed Jul 23 08:39:44 PDT 2025


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@@ -398,6 +398,10 @@ class RISCVTTIImpl final : public BasicTTIImplBase<RISCVTTIImpl> {
 
   bool enableInterleavedAccessVectorization() const override { return true; }
 
+  bool enableMaskedInterleavedAccessVectorization() const override {
+    return ST->hasVInstructions();
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preames wrote:

I think this is a case where the existing code probably should be checking for vector instructions, but that the difference is essentially stylistic.  The cost model results will penalize trying to vectorize without V enough that the feature being enabled won't really matter.  The major question (long term) is what we want to do if P ever stabilizes, but that's definitely future work.  

https://github.com/llvm/llvm-project/pull/150074


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