[llvm] [RISCV][TTI] Enable masked interleave vectorization (PR #150074)

[Philip Reames via llvm-commits]

preames wrote:

> In the other PR @Mel-Chen found a latent correctness issue with how we leave around header masks, which with this PR is probably enough to cause miscompiles if we don't convert the VPInterleaveRecipe loads/stores to VP intrinsics. I've filed an issue for it here: #150197.

I haven't dug through the overnight activity in full yet, but if we have a suspected miscompile, I'll definitely hold this.  We want to fix the miscompile, then enable more features. :)

https://github.com/llvm/llvm-project/pull/150074