[llvm] [AMDGPU][MC] Allow op_sel in v_alignbit_b32 etc in GFX9 and GFX10 (PR #142188)

[Jun Wang via llvm-commits]

jwanggit86 wrote:

> The types are not uniform across gfx9 and gfx10. For example, on gfx1010 and gfx900 src2 is 32 bits and on gfx1030 and gfx90a src2 is 16 bits. 
Where can I find this?



https://github.com/llvm/llvm-project/pull/142188