[llvm] [AMDGPU][MC] Allow op_sel in v_alignbit_b32 etc in GFX9 and GFX10 (PR #142188)

[Joe Nash via llvm-commits]

https://github.com/Sisyph requested changes to this pull request.

How do you intend to address the fact that some versions of gfx9 and gfx10 claim to op_sel and some do not?

What will the behavior be when op_sel is applied to 32 bit registers?

The issue you claim https://github.com/llvm/llvm-project/issues/38650 only suggests the op_sel might be supported, it is not a justification. How can this new support be used?


https://github.com/llvm/llvm-project/pull/142188