[llvm] [NVPTX] Vectorize and lower 256-bit global loads/stores for sm_100+/ptx88+ (PR #139292)

[Alex MacLean via llvm-commits]

================
@@ -3201,7 +3229,12 @@ NVPTXTargetLowering::LowerSTOREVector(SDValue Op, SelectionDAG &DAG) const {
   if (ValVT != MemVT)
     return SDValue();
 
-  const auto NumEltsAndEltVT = getVectorLoweringShape(ValVT);
+  // 256-bit vectors are only allowed iff the address is global
+  // and the target supports 256-bit loads/stores
+  unsigned AddrSpace = cast<MemSDNode>(N)->getAddressSpace();
----------------
AlexMaclean wrote:

`N` is already a `MemSDNode`.

https://github.com/llvm/llvm-project/pull/139292