[llvm] [NVPTX] Vectorize and lower 256-bit global loads/stores for sm_100+/ptx88+ (PR #139292)

[Alex MacLean via llvm-commits]

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@@ -5812,6 +5854,13 @@ static void ReplaceLoadVector(SDNode *N, SelectionDAG &DAG,
         DAG.getVTList({LoadEltVT, LoadEltVT, LoadEltVT, LoadEltVT, MVT::Other});
     break;
   }
+  case 8: {
+    Opcode = NVPTXISD::LoadV8;
+    EVT ListVTs[] = {LoadEltVT, LoadEltVT, LoadEltVT, LoadEltVT, LoadEltVT,
+                     LoadEltVT, LoadEltVT, LoadEltVT, MVT::Other};
+    LdResVTs = DAG.getVTList(ListVTs);
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AlexMaclean wrote:

Instead of constructing the LdResVTs in the switch. Could we use a SmallVector with the constructor that takes an element and a number of times to add it to the vector?

https://github.com/llvm/llvm-project/pull/139292