[llvm] [X86][BreakFalseDeps] Using reverse order for undef register selection (PR #137569)

[Phoebe Wang via llvm-commits]

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@@ -108,7 +108,7 @@ define <2 x double> @fpext01(<2 x double> %a0, <4 x float> %a1) nounwind {
 define double @funcA(ptr nocapture %e) nounwind uwtable readonly ssp {
 ; CHECK-LABEL: funcA:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    vcvtsi2sdq (%rdi), %xmm0, %xmm0
+; CHECK-NEXT:    vcvtsi2sdq (%rdi), %xmm15, %xmm0
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phoebewang wrote:

Do you mean the 2B VEX prefix vs. 3B? The source operand is encoded in `vvvv`, so won't affect the prefix size.

https://github.com/llvm/llvm-project/pull/137569