[llvm] [AMDGPU] 4-align TTMP triples (PR #132759)

[Matt Arsenault via llvm-commits]

arsenm wrote:

> There is no hardware use for them. To quote the (RDNA4) ISA doc, "Quad-alignment of SGPRs is required for operations on more than 64-bits".

Yes, there is no hardware use. But we can do an unaligned copy from a real value to a synthetic unaligned class and potentially avoid a spill 

https://github.com/llvm/llvm-project/pull/132759