[llvm] [AMDGPU] 4-align TTMP triples (PR #132759)

[Jay Foad via llvm-commits]

jayfoad wrote:

> > Aligning them on a 4-TTMP boundary matches what we do for SGPRs
> 
> We probably should have the unaligned SGPR classes

There is no hardware use for them. To quote the (RDNA4) ISA doc, "Quad-alignment of SGPRs is required for operations on more than 64-bits".

https://github.com/llvm/llvm-project/pull/132759