[llvm] [RISCV] Lower BUILD_VECTOR with i64 type to VID on RV32 if possible (PR #132339)

[Craig Topper via llvm-commits]

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@@ -1281,6 +1281,9 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
         if (!Subtarget.is64Bit() && VT.getVectorElementType() == MVT::i64) {
           setOperationAction(ISD::SPLAT_VECTOR, VT, Legal);
           setOperationAction(ISD::SPLAT_VECTOR_PARTS, VT, Custom);
+
+          // Lower BUILD_VECTOR with i64 type to VID on RV32 if possible.
+          setOperationAction(ISD::BUILD_VECTOR, MVT::i64, Custom);
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topperc wrote:

MVT::i64 is correct so that the type legalizer calls it when the scalar type is illegal. Calling it on the vector type would mean it only gets called after the type legalizer since the vector type is legal.

https://github.com/llvm/llvm-project/pull/132339