[llvm] [BOLT] Gadget scanner: factor out utility code (PR #131895)

[Kristof Beyls via llvm-commits]

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@@ -58,6 +59,71 @@ raw_ostream &operator<<(raw_ostream &OS, const MCInstReference &Ref) {
 
 namespace NonPacProtectedRetAnalysis {
 
+static void traceInst(const BinaryContext &BC, StringRef Label,
+                      const MCInst &MI) {
+  dbgs() << "  " << Label << ": ";
+  BC.printInstruction(dbgs(), MI);
+}
+
+static void traceReg(const BinaryContext &BC, StringRef Label,
+                     ErrorOr<MCPhysReg> Reg) {
+  dbgs() << "    " << Label << ": ";
+  if (Reg.getError())
+    dbgs() << "(error)";
+  else if (*Reg == BC.MIB->getNoRegister())
+    dbgs() << "(none)";
+  else
+    dbgs() << BC.MRI->getName(*Reg);
+  dbgs() << "\n";
+}
+
+static void traceRegMask(const BinaryContext &BC, StringRef Label,
+                         BitVector Mask) {
+  dbgs() << "    " << Label << ": ";
+  RegStatePrinter(BC).print(dbgs(), Mask);
+  dbgs() << "\n";
+}
+
+// This class represents mapping from arbitrary physical registers to
+// consecutive array indexes.
+class TrackedRegisters {
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kbeyls wrote:

It almost seems like the functionality of this class might be useful in other parts of LLVM backends too at some point. That makes me wonder if there's a more appropriate place for this class to live, e.g. in one of the central LLVM-IR libraries? I'm not sure where it would fit. I don't think this needs to be done in this PR. I thought I'd just share the idea in case you do have an idea of a more appropriate place for this class to live...

https://github.com/llvm/llvm-project/pull/131895