[llvm] [DAG][X86]added shrd in combineor for bzhiq+shlq+or (PR #125734)

[Phoebe Wang via llvm-commits]

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@@ -0,0 +1,90 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64,X64-FAST
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+slow-shld | FileCheck %s --check-prefixes=X64,X64-SLOW
+
+define  i64 @updateTop10Bits_64bits(i64  %A, i64  %B) {
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phoebewang wrote:

Replace 2 spaces with one.

https://github.com/llvm/llvm-project/pull/125734