[llvm] [RISCV] Support .option {no}exact (PR #122483)

[Craig Topper via llvm-commits]

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@@ -344,6 +344,10 @@ std::pair<bool, bool> RISCVAsmBackend::relaxLEB128(const MCAssembler &Asm,
 // Given a compressed control flow instruction this function returns
 // the expanded instruction.
 unsigned RISCVAsmBackend::getRelaxedOpcode(unsigned Op) const {
+  // Disable relaxation if FeatureExactAssembly
+  if (STI.hasFeature(RISCV::FeatureExactAssembly))
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topperc wrote:

I'm not sure getRelaxedOpcode should be a member. It only has 2 callers, it's not virtual, and it doesn't use any members variables.

https://github.com/llvm/llvm-project/pull/122483