[llvm] [RISCV] Support .option {no}exact (PR #122483)

[Sam Elliott via llvm-commits]

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@@ -254,7 +254,9 @@ void RISCVAsmPrinter::LowerSTATEPOINT(MCStreamer &OutStreamer, StackMaps &SM,
 bool RISCVAsmPrinter::EmitToStreamer(MCStreamer &S, const MCInst &Inst,
                                      const MCSubtargetInfo &SubtargetInfo) {
   MCInst CInst;
-  bool Res = RISCVRVC::compress(CInst, Inst, SubtargetInfo);
+  bool Res = false;
+  if (!SubtargetInfo.hasFeature(RISCV::FeatureExactAssembly))
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lenary wrote:

No. I think this would need a LLC test - let me work out what to do here -  I'm not sure which EmitToStreamer is used for inline assembly.

I think I only want to keep this if inline assembly hits it, otherwise I don't want to present this as something for compilation - exact mode is trying to just be for assembly.

https://github.com/llvm/llvm-project/pull/122483