[llvm] f611c22 - [ImplicitNullChecks] Use Register. NFC

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2025-03-06T22:25:51-08:00
New Revision: f611c22cb5b6b45d98591e8952e565c738a20ea3

URL: https://github.com/llvm/llvm-project/commit/f611c22cb5b6b45d98591e8952e565c738a20ea3
DIFF: https://github.com/llvm/llvm-project/commit/f611c22cb5b6b45d98591e8952e565c738a20ea3.diff

LOG: [ImplicitNullChecks] Use Register. NFC

Added: 
    

Modified: 
    llvm/lib/CodeGen/ImplicitNullChecks.cpp

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/ImplicitNullChecks.cpp b/llvm/lib/CodeGen/ImplicitNullChecks.cpp
index c586e07c7d042..82e0af897b4a5 100644
--- a/llvm/lib/CodeGen/ImplicitNullChecks.cpp
+++ b/llvm/lib/CodeGen/ImplicitNullChecks.cpp
@@ -195,7 +195,7 @@ class ImplicitNullChecks : public MachineFunctionPass {
   /// to be used. \p PrevInsts is the set of instruction seen since
   /// the explicit null check on \p PointerReg.
   SuitabilityResult isSuitableMemoryOp(const MachineInstr &MI,
-                                       unsigned PointerReg,
+                                       Register PointerReg,
                                        ArrayRef<MachineInstr *> PrevInsts);
 
   /// Returns true if \p DependenceMI can clobber the liveIns in NullSucc block
@@ -317,7 +317,7 @@ bool ImplicitNullChecks::runOnMachineFunction(MachineFunction &MF) {
 
 // Return true if any register aliasing \p Reg is live-in into \p MBB.
 static bool AnyAliasLiveIn(const TargetRegisterInfo *TRI,
-                           MachineBasicBlock *MBB, unsigned Reg) {
+                           MachineBasicBlock *MBB, Register Reg) {
   for (MCRegAliasIterator AR(Reg, TRI, /*IncludeSelf*/ true); AR.isValid();
        ++AR)
     if (MBB->isLiveIn(*AR))
@@ -362,7 +362,7 @@ ImplicitNullChecks::areMemoryOpsAliased(const MachineInstr &MI,
 
 ImplicitNullChecks::SuitabilityResult
 ImplicitNullChecks::isSuitableMemoryOp(const MachineInstr &MI,
-                                       unsigned PointerReg,
+                                       Register PointerReg,
                                        ArrayRef<MachineInstr *> PrevInsts) {
   // Implementation restriction for faulting_op insertion
   // TODO: This could be relaxed if we find a test case which warrants it.