[llvm] [AMDGPU][True16][CodeGen] update waitcnt for true16 (PR #128927)
Brox Chen via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 6 12:33:51 PST 2025
================
@@ -165,6 +165,18 @@ enum VmemType {
NUM_VMEM_TYPES
};
+static unsigned getRegPoint(const GCNSubtarget &ST, MCRegister Reg,
+ const SIRegisterInfo &TRI) {
+ // Order register interval points so that intervals of 32-bit VGPRs
+ // include intervals of their 16-bit halves.
+ MCRegister MCReg = AMDGPU::getMCReg(Reg, ST);
+ unsigned RegIdx = TRI.getHWRegIndex(MCReg);
+ bool IsHi = AMDGPU::isHi16Reg(MCReg, TRI);
+ bool IsVector = TRI.isVectorRegister(MCReg);
+ assert(isUInt<8>(RegIdx));
+ return (IsVector ? 0x200 : 0) | (RegIdx << 1) | (IsHi ? 1 : 0);
----------------
broxigarchen wrote:
removed 0x200
https://github.com/llvm/llvm-project/pull/128927
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