[llvm] [win] NFC: Rename `EHCatchret` to `EHCont` to allow for EH Continuation targets that aren't `catchret` instructions (PR #129953)
Daniel Paoliello via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 5 14:58:08 PST 2025
https://github.com/dpaoliello created https://github.com/llvm/llvm-project/pull/129953
This change splits out the renaming and comment updates from #129612 as a non-functional change.
>From ca8b611966231f49a2ffc3bd0df97408031c9347 Mon Sep 17 00:00:00 2001
From: "Daniel Paoliello (HE/HIM)" <danpao at microsoft.com>
Date: Mon, 3 Mar 2025 09:57:45 -0800
Subject: [PATCH] [win] NFC: Rename `EHCatchret` to `EHCont` to allow for EH
Continuation targets that aren't `catchret` instructions
---
llvm/include/llvm/CodeGen/MIRYamlMapping.h | 4 +-
llvm/include/llvm/CodeGen/MachineBasicBlock.h | 20 ++++-----
llvm/include/llvm/CodeGen/MachineFunction.h | 28 ++++++-------
llvm/include/llvm/CodeGen/Passes.h | 6 +--
llvm/include/llvm/InitializePasses.h | 2 +-
llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 4 +-
llvm/lib/CodeGen/AsmPrinter/WinException.cpp | 8 ++--
llvm/lib/CodeGen/CMakeLists.txt | 2 +-
...ardCatchret.cpp => EHContGuardTargets.cpp} | 42 +++++++++----------
llvm/lib/CodeGen/MIRParser/MIRParser.cpp | 2 +-
llvm/lib/CodeGen/MIRPrinter.cpp | 2 +-
llvm/lib/CodeGen/MachineBasicBlock.cpp | 8 ++--
.../SelectionDAG/SelectionDAGBuilder.cpp | 4 +-
.../Target/AArch64/AArch64TargetMachine.cpp | 2 +-
llvm/lib/Target/ARM/ARMTargetMachine.cpp | 2 +-
llvm/lib/Target/X86/X86TargetMachine.cpp | 2 +-
.../GlobalISel/store-merging-debug.mir | 2 +-
.../cfi-fixup-multi-block-prologue.mir | 2 +-
.../emit_fneg_with_non_register_operand.mir | 2 +-
.../AArch64/machine-latecleanup-inlineasm.mir | 2 +-
.../CodeGen/AArch64/nested-iv-regalloc.mir | 2 +-
...egalloc-last-chance-recolor-with-split.mir | 2 +-
.../AArch64/sink-and-fold-drop-dbg.mir | 2 +-
.../AArch64/sink-and-fold-illegal-shift.mir | 2 +-
.../sink-and-fold-preserve-debugloc.mir | 4 +-
llvm/test/CodeGen/AArch64/split-deadloop.mir | 2 +-
.../AArch64/stack-probing-last-in-block.mir | 2 +-
.../AArch64/tail-dup-redundant-phi.mir | 2 +-
llvm/test/CodeGen/AArch64/wineh9.mir | 2 +-
.../CodeGen/ARM/execute-only-save-cpsr.mir | 8 ++--
llvm/test/CodeGen/ARM/inlineasmbr-if-cvt.mir | 2 +-
.../test/CodeGen/ARM/jump-table-dbg-value.mir | 2 +-
.../CodeGen/Hexagon/cext-opt-block-addr.mir | 4 +-
.../test/CodeGen/Hexagon/rdf-copy-clobber.mir | 2 +-
llvm/test/CodeGen/Hexagon/rdf-phi-clobber.mir | 2 +-
.../MIR/Hexagon/addrmode-opt-nonreaching.mir | 2 +-
.../MIR/X86/exception-function-state.mir | 16 +++----
.../MIR/X86/inline-asm-rm-exhaustion.mir | 6 +--
llvm/test/CodeGen/NVPTX/proxy-reg-erasure.mir | 2 +-
.../PowerPC/ctrloop-do-not-duplicate-mi.mir | 2 +-
...ole-replaceInstr-after-eliminate-extsw.mir | 2 +-
.../RISCV/rvv/undef-earlyclobber-chain.mir | 2 +-
.../CodeGen/RISCV/stack-slot-coloring.mir | 2 +-
.../mve-reduct-livein-arg.mir | 2 +-
.../Thumb2/constant-islands-no-split.mir | 2 +-
.../Thumb2/pipeliner-preserve-ties.mir | 2 +-
.../multivalue-dont-move-def-past-use.mir | 2 +-
.../X86/align-basic-block-sections.mir | 2 +-
.../X86/amx_tile_pair_configure_O0.mir | 2 +-
.../X86/amx_tile_pair_configure_O2.mir | 2 +-
llvm/test/CodeGen/X86/amx_tile_pair_copy.mir | 2 +-
.../X86/amx_tile_pair_preconfigure_O0.mir | 2 +-
.../X86/amx_tile_pair_preconfigure_O2.mir | 2 +-
.../CodeGen/X86/apx/domain-reassignment.mir | 2 +-
llvm/test/CodeGen/X86/apx/memfold-nd2rmw.mir | 2 +-
.../X86/basic-block-address-map-mir-parse.mir | 2 +-
.../CodeGen/X86/break-false-dep-crash.mir | 2 +-
.../X86/callbr-asm-outputs-regallocfast.mir | 2 +-
llvm/test/CodeGen/X86/cse-two-preds.mir | 2 +-
llvm/test/CodeGen/X86/domain-reassignment.mir | 2 +-
.../CodeGen/X86/machine-licm-vs-wineh.mir | 2 +-
.../CodeGen/X86/peephole-test-after-add.mir | 6 +--
.../X86/zero-call-used-regs-debug-info.mir | 2 +-
.../ARM/move-dbg-values-imm-test.mir | 2 +-
.../MIR/X86/instr-ref-join-def-vphi.mir | 2 +-
.../X86/instr-ref-track-clobbers.mir | 2 +-
.../MachineVerifier/verify-inlineasmbr.mir | 2 +-
.../Inputs/x86-MIFlags.mir | 2 +-
.../Inputs/x86-MIFlags.mir.expected | 2 +-
.../llvm-reduce/mir/preserve-func-info.mir | 4 +-
llvm/tools/llvm-reduce/ReducerWorkItem.cpp | 7 ++--
.../CodeGen/DroppedVariableStatsMIRTest.cpp | 14 +++----
.../gn/secondary/llvm/lib/CodeGen/BUILD.gn | 2 +-
73 files changed, 150 insertions(+), 153 deletions(-)
rename llvm/lib/CodeGen/{EHContGuardCatchret.cpp => EHContGuardTargets.cpp} (56%)
diff --git a/llvm/include/llvm/CodeGen/MIRYamlMapping.h b/llvm/include/llvm/CodeGen/MIRYamlMapping.h
index dbad3469d047d..119786f045ed9 100644
--- a/llvm/include/llvm/CodeGen/MIRYamlMapping.h
+++ b/llvm/include/llvm/CodeGen/MIRYamlMapping.h
@@ -762,7 +762,7 @@ struct MachineFunction {
bool CallsEHReturn = false;
bool CallsUnwindInit = false;
- bool HasEHCatchret = false;
+ bool HasEHContTarget = false;
bool HasEHScopes = false;
bool HasEHFunclets = false;
bool IsOutlined = false;
@@ -810,7 +810,7 @@ template <> struct MappingTraits<MachineFunction> {
YamlIO.mapOptional("callsEHReturn", MF.CallsEHReturn, false);
YamlIO.mapOptional("callsUnwindInit", MF.CallsUnwindInit, false);
- YamlIO.mapOptional("hasEHCatchret", MF.HasEHCatchret, false);
+ YamlIO.mapOptional("hasEHContTarget", MF.HasEHContTarget, false);
YamlIO.mapOptional("hasEHScopes", MF.HasEHScopes, false);
YamlIO.mapOptional("hasEHFunclets", MF.HasEHFunclets, false);
YamlIO.mapOptional("isOutlined", MF.IsOutlined, false);
diff --git a/llvm/include/llvm/CodeGen/MachineBasicBlock.h b/llvm/include/llvm/CodeGen/MachineBasicBlock.h
index 2de96fa85b936..0d105488ee2db 100644
--- a/llvm/include/llvm/CodeGen/MachineBasicBlock.h
+++ b/llvm/include/llvm/CodeGen/MachineBasicBlock.h
@@ -205,8 +205,8 @@ class MachineBasicBlock
/// LLVM IR.
bool IsEHScopeEntry = false;
- /// Indicates if this is a target block of a catchret.
- bool IsEHCatchretTarget = false;
+ /// Indicates if this is a target of Windows EH Continuation Guard.
+ bool IsEHContTarget = false;
/// Indicate that this basic block is the entry block of an EH funclet.
bool IsEHFuncletEntry = false;
@@ -234,8 +234,8 @@ class MachineBasicBlock
/// is only computed once and is cached.
mutable MCSymbol *CachedMCSymbol = nullptr;
- /// Cached MCSymbol for this block (used if IsEHCatchRetTarget).
- mutable MCSymbol *CachedEHCatchretMCSymbol = nullptr;
+ /// Cached MCSymbol for this block (used if IsEHContTarget).
+ mutable MCSymbol *CachedEHContMCSymbol = nullptr;
/// Marks the end of the basic block. Used during basic block sections to
/// calculate the size of the basic block, or the BB section ending with it.
@@ -652,11 +652,11 @@ class MachineBasicBlock
/// that used to have a catchpad or cleanuppad instruction in the LLVM IR.
void setIsEHScopeEntry(bool V = true) { IsEHScopeEntry = V; }
- /// Returns true if this is a target block of a catchret.
- bool isEHCatchretTarget() const { return IsEHCatchretTarget; }
+ /// Returns true if this is a target of Windows EH Continuation Guard.
+ bool isEHContTarget() const { return IsEHContTarget; }
- /// Indicates if this is a target block of a catchret.
- void setIsEHCatchretTarget(bool V = true) { IsEHCatchretTarget = V; }
+ /// Indicates if this is a target of Windows EH Continuation Guard.
+ void setIsEHContTarget(bool V = true) { IsEHContTarget = V; }
/// Returns true if this is the entry block of an EH funclet.
bool isEHFuncletEntry() const { return IsEHFuncletEntry; }
@@ -1238,8 +1238,8 @@ class MachineBasicBlock
/// Return the MCSymbol for this basic block.
MCSymbol *getSymbol() const;
- /// Return the EHCatchret Symbol for this basic block.
- MCSymbol *getEHCatchretSymbol() const;
+ /// Return the Windows EH Continuation Symbol for this basic block.
+ MCSymbol *getEHContSymbol() const;
std::optional<uint64_t> getIrrLoopHeaderWeight() const {
return IrrLoopHeaderWeight;
diff --git a/llvm/include/llvm/CodeGen/MachineFunction.h b/llvm/include/llvm/CodeGen/MachineFunction.h
index 408428fe28a32..9a4d990bd0afa 100644
--- a/llvm/include/llvm/CodeGen/MachineFunction.h
+++ b/llvm/include/llvm/CodeGen/MachineFunction.h
@@ -359,9 +359,9 @@ class LLVM_ABI MachineFunction {
/// construct a table of valid longjmp targets for Windows Control Flow Guard.
std::vector<MCSymbol *> LongjmpTargets;
- /// List of basic blocks that are the target of catchrets. Used to construct
- /// a table of valid targets for Windows EHCont Guard.
- std::vector<MCSymbol *> CatchretTargets;
+ /// List of basic blocks that are the targets for Windows EH Continuation
+ /// Guard.
+ std::vector<MCSymbol *> EHContTargets;
/// \name Exception Handling
/// \{
@@ -383,7 +383,7 @@ class LLVM_ABI MachineFunction {
bool CallsEHReturn = false;
bool CallsUnwindInit = false;
- bool HasEHCatchret = false;
+ bool HasEHContTarget = false;
bool HasEHScopes = false;
bool HasEHFunclets = false;
bool HasFakeUses = false;
@@ -1197,17 +1197,15 @@ class LLVM_ABI MachineFunction {
/// Control Flow Guard.
void addLongjmpTarget(MCSymbol *Target) { LongjmpTargets.push_back(Target); }
- /// Returns a reference to a list of symbols that we have catchrets.
- /// Used to construct the catchret target table used by Windows EHCont Guard.
- const std::vector<MCSymbol *> &getCatchretTargets() const {
- return CatchretTargets;
+ /// Returns a reference to a list of symbols that are targets for Windows
+ /// EH Continuation Guard.
+ const std::vector<MCSymbol *> &getEHContTargets() const {
+ return EHContTargets;
}
- /// Add the specified symbol to the list of valid catchret targets for Windows
- /// EHCont Guard.
- void addCatchretTarget(MCSymbol *Target) {
- CatchretTargets.push_back(Target);
- }
+ /// Add the specified symbol to the list of targets for Windows EH
+ /// Continuation Guard.
+ void addEHContTarget(MCSymbol *Target) { EHContTargets.push_back(Target); }
/// Tries to get the global and target flags for a call site, if the
/// instruction is a call to a global.
@@ -1236,8 +1234,8 @@ class LLVM_ABI MachineFunction {
bool callsUnwindInit() const { return CallsUnwindInit; }
void setCallsUnwindInit(bool b) { CallsUnwindInit = b; }
- bool hasEHCatchret() const { return HasEHCatchret; }
- void setHasEHCatchret(bool V) { HasEHCatchret = V; }
+ bool hasEHContTarget() const { return HasEHContTarget; }
+ void setHasEHContTarget(bool V) { HasEHContTarget = V; }
bool hasEHScopes() const { return HasEHScopes; }
void setHasEHScopes(bool V) { HasEHScopes = V; }
diff --git a/llvm/include/llvm/CodeGen/Passes.h b/llvm/include/llvm/CodeGen/Passes.h
index 5fa67a29ddbb6..dbd61d6b2b2a8 100644
--- a/llvm/include/llvm/CodeGen/Passes.h
+++ b/llvm/include/llvm/CodeGen/Passes.h
@@ -550,9 +550,9 @@ namespace llvm {
/// \see CFGuardLongjmp.cpp
FunctionPass *createCFGuardLongjmpPass();
- /// Creates EHContGuard catchret target identification pass.
- /// \see EHContGuardCatchret.cpp
- FunctionPass *createEHContGuardCatchretPass();
+ /// Creates Windows EH Continuation Guard target identification pass.
+ /// \see EHContGuardTargets.cpp
+ FunctionPass *createEHContGuardTargetsPass();
/// Create Hardware Loop pass. \see HardwareLoops.cpp
FunctionPass *createHardwareLoopsLegacyPass();
diff --git a/llvm/include/llvm/InitializePasses.h b/llvm/include/llvm/InitializePasses.h
index c2cb4cb4ef477..a05e876806ab5 100644
--- a/llvm/include/llvm/InitializePasses.h
+++ b/llvm/include/llvm/InitializePasses.h
@@ -104,7 +104,7 @@ void initializeEarlyIfPredicatorPass(PassRegistry &);
void initializeEarlyMachineLICMPass(PassRegistry &);
void initializeEarlyTailDuplicateLegacyPass(PassRegistry &);
void initializeEdgeBundlesWrapperLegacyPass(PassRegistry &);
-void initializeEHContGuardCatchretPass(PassRegistry &);
+void initializeEHContGuardTargetsPass(PassRegistry &);
void initializeExpandLargeFpConvertLegacyPassPass(PassRegistry &);
void initializeExpandLargeDivRemLegacyPassPass(PassRegistry &);
void initializeExpandMemCmpLegacyPassPass(PassRegistry &);
diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
index 6f39bff80abda..6d99cb3a516cc 100644
--- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
@@ -4288,9 +4288,9 @@ void AsmPrinter::emitBasicBlockStart(const MachineBasicBlock &MBB) {
}
}
- if (MBB.isEHCatchretTarget() &&
+ if (MBB.isEHContTarget() &&
MAI->getExceptionHandlingType() == ExceptionHandling::WinEH) {
- OutStreamer->emitLabel(MBB.getEHCatchretSymbol());
+ OutStreamer->emitLabel(MBB.getEHContSymbol());
}
// With BB sections, each basic block must handle CFI information on its own
diff --git a/llvm/lib/CodeGen/AsmPrinter/WinException.cpp b/llvm/lib/CodeGen/AsmPrinter/WinException.cpp
index 97b4a6a42d81d..d51ac2ac89f35 100644
--- a/llvm/lib/CodeGen/AsmPrinter/WinException.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/WinException.cpp
@@ -160,10 +160,10 @@ void WinException::endFunction(const MachineFunction *MF) {
Asm->OutStreamer->popSection();
}
- if (!MF->getCatchretTargets().empty()) {
- // Copy the function's catchret targets to a module-level list.
- EHContTargets.insert(EHContTargets.end(), MF->getCatchretTargets().begin(),
- MF->getCatchretTargets().end());
+ if (!MF->getEHContTargets().empty()) {
+ // Copy the function's EH Continuation targets to a module-level list.
+ EHContTargets.insert(EHContTargets.end(), MF->getEHContTargets().begin(),
+ MF->getEHContTargets().end());
}
}
diff --git a/llvm/lib/CodeGen/CMakeLists.txt b/llvm/lib/CodeGen/CMakeLists.txt
index 23ec3310079d3..0c92637a75e77 100644
--- a/llvm/lib/CodeGen/CMakeLists.txt
+++ b/llvm/lib/CodeGen/CMakeLists.txt
@@ -54,7 +54,7 @@ add_llvm_component_library(LLVMCodeGen
DwarfEHPrepare.cpp
EarlyIfConversion.cpp
EdgeBundles.cpp
- EHContGuardCatchret.cpp
+ EHContGuardTargets.cpp
ExecutionDomainFix.cpp
ExpandLargeDivRem.cpp
ExpandLargeFpConvert.cpp
diff --git a/llvm/lib/CodeGen/EHContGuardCatchret.cpp b/llvm/lib/CodeGen/EHContGuardTargets.cpp
similarity index 56%
rename from llvm/lib/CodeGen/EHContGuardCatchret.cpp
rename to llvm/lib/CodeGen/EHContGuardTargets.cpp
index cd1cdb0653618..94d3b42b7b90b 100644
--- a/llvm/lib/CodeGen/EHContGuardCatchret.cpp
+++ b/llvm/lib/CodeGen/EHContGuardTargets.cpp
@@ -1,4 +1,4 @@
-//===-- EHContGuardCatchret.cpp - Catchret target symbols -------*- C++ -*-===//
+//===-- EHContGuardTargets.cpp - EH continuation target symbols -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
@@ -8,9 +8,10 @@
///
/// \file
/// This file contains a machine function pass to insert a symbol before each
-/// valid catchret target and store this in the MachineFunction's
-/// CatchRetTargets vector. This will be used to emit the table of valid targets
-/// used by EHCont Guard.
+/// valid target where the unwinder in Windows may continue exectution after an
+/// exception is thrown and store this in the MachineFunction's EHContTargets
+/// vector. This will be used to emit the table of valid targets used by Windows
+/// EH Continuation Guard.
///
//===----------------------------------------------------------------------===//
@@ -26,19 +27,18 @@ using namespace llvm;
#define DEBUG_TYPE "ehcontguard-catchret"
-STATISTIC(EHContGuardCatchretTargets,
- "Number of EHCont Guard catchret targets");
+STATISTIC(EHContGuardTargetsFound, "Number of EHCont Guard targets");
namespace {
/// MachineFunction pass to insert a symbol before each valid catchret target
/// and store these in the MachineFunction's CatchRetTargets vector.
-class EHContGuardCatchret : public MachineFunctionPass {
+class EHContGuardTargets : public MachineFunctionPass {
public:
static char ID;
- EHContGuardCatchret() : MachineFunctionPass(ID) {
- initializeEHContGuardCatchretPass(*PassRegistry::getPassRegistry());
+ EHContGuardTargets() : MachineFunctionPass(ID) {
+ initializeEHContGuardTargetsPass(*PassRegistry::getPassRegistry());
}
StringRef getPassName() const override {
@@ -50,31 +50,31 @@ class EHContGuardCatchret : public MachineFunctionPass {
} // end anonymous namespace
-char EHContGuardCatchret::ID = 0;
+char EHContGuardTargets::ID = 0;
-INITIALIZE_PASS(EHContGuardCatchret, "EHContGuardCatchret",
- "Insert symbols at valid catchret targets for /guard:ehcont",
- false, false)
-FunctionPass *llvm::createEHContGuardCatchretPass() {
- return new EHContGuardCatchret();
+INITIALIZE_PASS(EHContGuardTargets, "EHContGuardTargets",
+ "Insert symbols at valid targets for /guard:ehcont", false,
+ false)
+FunctionPass *llvm::createEHContGuardTargetsPass() {
+ return new EHContGuardTargets();
}
-bool EHContGuardCatchret::runOnMachineFunction(MachineFunction &MF) {
+bool EHContGuardTargets::runOnMachineFunction(MachineFunction &MF) {
// Skip modules for which the ehcontguard flag is not set.
if (!MF.getFunction().getParent()->getModuleFlag("ehcontguard"))
return false;
- // Skip functions that do not have catchret
- if (!MF.hasEHCatchret())
+ // Skip functions that do not have targets
+ if (!MF.hasEHContTarget())
return false;
bool Result = false;
for (MachineBasicBlock &MBB : MF) {
- if (MBB.isEHCatchretTarget()) {
- MF.addCatchretTarget(MBB.getEHCatchretSymbol());
- EHContGuardCatchretTargets++;
+ if (MBB.isEHContTarget()) {
+ MF.addEHContTarget(MBB.getEHContSymbol());
+ EHContGuardTargetsFound++;
Result = true;
}
}
diff --git a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
index b195683051c90..905c1cfa2dc46 100644
--- a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
@@ -551,7 +551,7 @@ MIRParserImpl::initializeMachineFunction(const yaml::MachineFunction &YamlMF,
MF.setCallsEHReturn(YamlMF.CallsEHReturn);
MF.setCallsUnwindInit(YamlMF.CallsUnwindInit);
- MF.setHasEHCatchret(YamlMF.HasEHCatchret);
+ MF.setHasEHContTarget(YamlMF.HasEHContTarget);
MF.setHasEHScopes(YamlMF.HasEHScopes);
MF.setHasEHFunclets(YamlMF.HasEHFunclets);
MF.setIsOutlined(YamlMF.IsOutlined);
diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp
index 96ba475f93844..e9bd60e4e2597 100644
--- a/llvm/lib/CodeGen/MIRPrinter.cpp
+++ b/llvm/lib/CodeGen/MIRPrinter.cpp
@@ -208,7 +208,7 @@ void MIRPrinter::print(const MachineFunction &MF) {
YamlMF.CallsEHReturn = MF.callsEHReturn();
YamlMF.CallsUnwindInit = MF.callsUnwindInit();
- YamlMF.HasEHCatchret = MF.hasEHCatchret();
+ YamlMF.HasEHContTarget = MF.hasEHContTarget();
YamlMF.HasEHScopes = MF.hasEHScopes();
YamlMF.HasEHFunclets = MF.hasEHFunclets();
YamlMF.HasFakeUses = MF.hasFakeUses();
diff --git a/llvm/lib/CodeGen/MachineBasicBlock.cpp b/llvm/lib/CodeGen/MachineBasicBlock.cpp
index b3a71d1144726..fa6b53455f145 100644
--- a/llvm/lib/CodeGen/MachineBasicBlock.cpp
+++ b/llvm/lib/CodeGen/MachineBasicBlock.cpp
@@ -92,15 +92,15 @@ MCSymbol *MachineBasicBlock::getSymbol() const {
return CachedMCSymbol;
}
-MCSymbol *MachineBasicBlock::getEHCatchretSymbol() const {
- if (!CachedEHCatchretMCSymbol) {
+MCSymbol *MachineBasicBlock::getEHContSymbol() const {
+ if (!CachedEHContMCSymbol) {
const MachineFunction *MF = getParent();
SmallString<128> SymbolName;
raw_svector_ostream(SymbolName)
<< "$ehgcr_" << MF->getFunctionNumber() << '_' << getNumber();
- CachedEHCatchretMCSymbol = MF->getContext().getOrCreateSymbol(SymbolName);
+ CachedEHContMCSymbol = MF->getContext().getOrCreateSymbol(SymbolName);
}
- return CachedEHCatchretMCSymbol;
+ return CachedEHContMCSymbol;
}
MCSymbol *MachineBasicBlock::getEndSymbol() const {
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index d5a07e616236e..d2df323fce638 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -1981,8 +1981,8 @@ void SelectionDAGBuilder::visitCatchRet(const CatchReturnInst &I) {
// Update machine-CFG edge.
MachineBasicBlock *TargetMBB = FuncInfo.getMBB(I.getSuccessor());
FuncInfo.MBB->addSuccessor(TargetMBB);
- TargetMBB->setIsEHCatchretTarget(true);
- DAG.getMachineFunction().setHasEHCatchret(true);
+ TargetMBB->setIsEHContTarget(true);
+ DAG.getMachineFunction().setHasEHContTarget(true);
auto Pers = classifyEHPersonality(FuncInfo.Fn->getPersonalityFn());
bool IsSEH = isAsynchronousEHPersonality(Pers);
diff --git a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
index d10a0c0a08f89..5c514bf02968a 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
+++ b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
@@ -869,7 +869,7 @@ void AArch64PassConfig::addPreEmitPass() {
// Identify valid longjmp targets for Windows Control Flow Guard.
addPass(createCFGuardLongjmpPass());
// Identify valid eh continuation targets for Windows EHCont Guard.
- addPass(createEHContGuardCatchretPass());
+ addPass(createEHContGuardTargetsPass());
}
if (TM->getOptLevel() != CodeGenOptLevel::None && EnableCollectLOH &&
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
index 98bdf310dea91..a0d56704305a3 100644
--- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
@@ -620,7 +620,7 @@ void ARMPassConfig::addPreEmitPass2() {
// Identify valid longjmp targets for Windows Control Flow Guard.
addPass(createCFGuardLongjmpPass());
// Identify valid eh continuation targets for Windows EHCont Guard.
- addPass(createEHContGuardCatchretPass());
+ addPass(createEHContGuardTargetsPass());
}
}
diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp
index 0430279b88984..4cecbbf27aa30 100644
--- a/llvm/lib/Target/X86/X86TargetMachine.cpp
+++ b/llvm/lib/Target/X86/X86TargetMachine.cpp
@@ -647,7 +647,7 @@ void X86PassConfig::addPreEmitPass2() {
// Identify valid longjmp targets for Windows Control Flow Guard.
addPass(createCFGuardLongjmpPass());
// Identify valid eh continuation targets for Windows EHCont Guard.
- addPass(createEHContGuardCatchretPass());
+ addPass(createEHContGuardTargetsPass());
}
addPass(createX86LoadValueInjectionRetHardeningPass());
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/store-merging-debug.mir b/llvm/test/CodeGen/AArch64/GlobalISel/store-merging-debug.mir
index d52ef0f3da74c..2f4dbb7d47af5 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/store-merging-debug.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/store-merging-debug.mir
@@ -48,7 +48,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
failsVerification: false
diff --git a/llvm/test/CodeGen/AArch64/cfi-fixup-multi-block-prologue.mir b/llvm/test/CodeGen/AArch64/cfi-fixup-multi-block-prologue.mir
index 31fa3832367be..1ec18b987c1f2 100644
--- a/llvm/test/CodeGen/AArch64/cfi-fixup-multi-block-prologue.mir
+++ b/llvm/test/CodeGen/AArch64/cfi-fixup-multi-block-prologue.mir
@@ -51,7 +51,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
diff --git a/llvm/test/CodeGen/AArch64/emit_fneg_with_non_register_operand.mir b/llvm/test/CodeGen/AArch64/emit_fneg_with_non_register_operand.mir
index f9878adfe5e44..253e6a9c076c6 100644
--- a/llvm/test/CodeGen/AArch64/emit_fneg_with_non_register_operand.mir
+++ b/llvm/test/CodeGen/AArch64/emit_fneg_with_non_register_operand.mir
@@ -39,7 +39,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
diff --git a/llvm/test/CodeGen/AArch64/machine-latecleanup-inlineasm.mir b/llvm/test/CodeGen/AArch64/machine-latecleanup-inlineasm.mir
index 9a8e5c6341bca..c5f871a37d5f6 100644
--- a/llvm/test/CodeGen/AArch64/machine-latecleanup-inlineasm.mir
+++ b/llvm/test/CodeGen/AArch64/machine-latecleanup-inlineasm.mir
@@ -56,7 +56,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
diff --git a/llvm/test/CodeGen/AArch64/nested-iv-regalloc.mir b/llvm/test/CodeGen/AArch64/nested-iv-regalloc.mir
index ff29c78b5a0ce..4d67a242a236f 100644
--- a/llvm/test/CodeGen/AArch64/nested-iv-regalloc.mir
+++ b/llvm/test/CodeGen/AArch64/nested-iv-regalloc.mir
@@ -97,7 +97,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
diff --git a/llvm/test/CodeGen/AArch64/regalloc-last-chance-recolor-with-split.mir b/llvm/test/CodeGen/AArch64/regalloc-last-chance-recolor-with-split.mir
index 9bd3ad9165cee..8fd439f729a7e 100644
--- a/llvm/test/CodeGen/AArch64/regalloc-last-chance-recolor-with-split.mir
+++ b/llvm/test/CodeGen/AArch64/regalloc-last-chance-recolor-with-split.mir
@@ -84,7 +84,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
failsVerification: false
diff --git a/llvm/test/CodeGen/AArch64/sink-and-fold-drop-dbg.mir b/llvm/test/CodeGen/AArch64/sink-and-fold-drop-dbg.mir
index b0280f268f3ff..b29737941b9d2 100644
--- a/llvm/test/CodeGen/AArch64/sink-and-fold-drop-dbg.mir
+++ b/llvm/test/CodeGen/AArch64/sink-and-fold-drop-dbg.mir
@@ -67,7 +67,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
diff --git a/llvm/test/CodeGen/AArch64/sink-and-fold-illegal-shift.mir b/llvm/test/CodeGen/AArch64/sink-and-fold-illegal-shift.mir
index d2f6a3ab1aeeb..21194e812b897 100644
--- a/llvm/test/CodeGen/AArch64/sink-and-fold-illegal-shift.mir
+++ b/llvm/test/CodeGen/AArch64/sink-and-fold-illegal-shift.mir
@@ -27,7 +27,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
diff --git a/llvm/test/CodeGen/AArch64/sink-and-fold-preserve-debugloc.mir b/llvm/test/CodeGen/AArch64/sink-and-fold-preserve-debugloc.mir
index f146c4436bbfa..e0c2a547217ee 100644
--- a/llvm/test/CodeGen/AArch64/sink-and-fold-preserve-debugloc.mir
+++ b/llvm/test/CodeGen/AArch64/sink-and-fold-preserve-debugloc.mir
@@ -83,7 +83,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
@@ -156,7 +156,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
diff --git a/llvm/test/CodeGen/AArch64/split-deadloop.mir b/llvm/test/CodeGen/AArch64/split-deadloop.mir
index d5f8303ab13ec..000aea02e3425 100644
--- a/llvm/test/CodeGen/AArch64/split-deadloop.mir
+++ b/llvm/test/CodeGen/AArch64/split-deadloop.mir
@@ -31,7 +31,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
diff --git a/llvm/test/CodeGen/AArch64/stack-probing-last-in-block.mir b/llvm/test/CodeGen/AArch64/stack-probing-last-in-block.mir
index 6c8ec7e4c4fa9..39dba30de469f 100644
--- a/llvm/test/CodeGen/AArch64/stack-probing-last-in-block.mir
+++ b/llvm/test/CodeGen/AArch64/stack-probing-last-in-block.mir
@@ -37,7 +37,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
diff --git a/llvm/test/CodeGen/AArch64/tail-dup-redundant-phi.mir b/llvm/test/CodeGen/AArch64/tail-dup-redundant-phi.mir
index bc141ff5084ca..b728eedfa5a92 100644
--- a/llvm/test/CodeGen/AArch64/tail-dup-redundant-phi.mir
+++ b/llvm/test/CodeGen/AArch64/tail-dup-redundant-phi.mir
@@ -109,7 +109,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
failsVerification: false
diff --git a/llvm/test/CodeGen/AArch64/wineh9.mir b/llvm/test/CodeGen/AArch64/wineh9.mir
index 3586ea5bc43b4..ef26970dda04c 100644
--- a/llvm/test/CodeGen/AArch64/wineh9.mir
+++ b/llvm/test/CodeGen/AArch64/wineh9.mir
@@ -29,7 +29,7 @@ tracksRegLiveness: true
hasWinCFI: true
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
failsVerification: false
diff --git a/llvm/test/CodeGen/ARM/execute-only-save-cpsr.mir b/llvm/test/CodeGen/ARM/execute-only-save-cpsr.mir
index 67e05218a4f19..cdd8ed49c6156 100644
--- a/llvm/test/CodeGen/ARM/execute-only-save-cpsr.mir
+++ b/llvm/test/CodeGen/ARM/execute-only-save-cpsr.mir
@@ -89,7 +89,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
@@ -175,7 +175,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
@@ -267,7 +267,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
@@ -359,7 +359,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
diff --git a/llvm/test/CodeGen/ARM/inlineasmbr-if-cvt.mir b/llvm/test/CodeGen/ARM/inlineasmbr-if-cvt.mir
index ad45edc9835f5..2d53074923151 100644
--- a/llvm/test/CodeGen/ARM/inlineasmbr-if-cvt.mir
+++ b/llvm/test/CodeGen/ARM/inlineasmbr-if-cvt.mir
@@ -41,7 +41,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
debugInstrRef: false
diff --git a/llvm/test/CodeGen/ARM/jump-table-dbg-value.mir b/llvm/test/CodeGen/ARM/jump-table-dbg-value.mir
index 413f5ef52929b..ec475e1b52ef1 100644
--- a/llvm/test/CodeGen/ARM/jump-table-dbg-value.mir
+++ b/llvm/test/CodeGen/ARM/jump-table-dbg-value.mir
@@ -70,7 +70,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
debugInstrRef: false
diff --git a/llvm/test/CodeGen/Hexagon/cext-opt-block-addr.mir b/llvm/test/CodeGen/Hexagon/cext-opt-block-addr.mir
index 859ff8b68257c..807afd7e304b4 100644
--- a/llvm/test/CodeGen/Hexagon/cext-opt-block-addr.mir
+++ b/llvm/test/CodeGen/Hexagon/cext-opt-block-addr.mir
@@ -46,7 +46,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
@@ -107,7 +107,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
diff --git a/llvm/test/CodeGen/Hexagon/rdf-copy-clobber.mir b/llvm/test/CodeGen/Hexagon/rdf-copy-clobber.mir
index e0676a143eefe..3d1b4345dde11 100644
--- a/llvm/test/CodeGen/Hexagon/rdf-copy-clobber.mir
+++ b/llvm/test/CodeGen/Hexagon/rdf-copy-clobber.mir
@@ -36,7 +36,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
diff --git a/llvm/test/CodeGen/Hexagon/rdf-phi-clobber.mir b/llvm/test/CodeGen/Hexagon/rdf-phi-clobber.mir
index d49cc3403d644..5aebe730e55c4 100644
--- a/llvm/test/CodeGen/Hexagon/rdf-phi-clobber.mir
+++ b/llvm/test/CodeGen/Hexagon/rdf-phi-clobber.mir
@@ -31,7 +31,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
diff --git a/llvm/test/CodeGen/MIR/Hexagon/addrmode-opt-nonreaching.mir b/llvm/test/CodeGen/MIR/Hexagon/addrmode-opt-nonreaching.mir
index 6115c144c31fe..bfdf4b4fbd806 100644
--- a/llvm/test/CodeGen/MIR/Hexagon/addrmode-opt-nonreaching.mir
+++ b/llvm/test/CodeGen/MIR/Hexagon/addrmode-opt-nonreaching.mir
@@ -95,7 +95,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
diff --git a/llvm/test/CodeGen/MIR/X86/exception-function-state.mir b/llvm/test/CodeGen/MIR/X86/exception-function-state.mir
index af974ad0e79e1..f8bfc02b5f81e 100644
--- a/llvm/test/CodeGen/MIR/X86/exception-function-state.mir
+++ b/llvm/test/CodeGen/MIR/X86/exception-function-state.mir
@@ -7,7 +7,7 @@
# ALL: name: func0
# ALL: callsEHReturn: true
# ALL: callsUnwindInit: true
-# ALL: hasEHCatchret: true
+# ALL: hasEHContTarget: true
# ALL: hasEHScopes: true
# ALL: hasEHFunclets: true
@@ -15,7 +15,7 @@
name: func0
callsEHReturn: true
callsUnwindInit: true
-hasEHCatchret: true
+hasEHContTarget: true
hasEHScopes: true
hasEHFunclets: true
body: |
@@ -25,13 +25,13 @@ body: |
# ALL: name: func1
# FULL: callsEHReturn: false
# FULL: callsUnwindInit: true
-# FULL: hasEHCatchret: false
+# FULL: hasEHContTarget: false
# FULL: hasEHScopes: true
# FULL: hasEHFunclets: false
# SIMPLE-NOT: callsEHReturn
# SIMPLE: callsUnwindInit: true
-# SIMPLE-NOT: hasEHCatchret
+# SIMPLE-NOT: hasEHContTarget
# SIMPLE: hasEHScopes: true
# SIMPLE-NOT: hasEHFunclets
---
@@ -39,7 +39,7 @@ name: func1
tracksRegLiveness: true
callsEHReturn: false
callsUnwindInit: true
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: true
hasEHFunclets: false
body: |
@@ -49,13 +49,13 @@ body: |
# ALL: name: func2
# FULL: callsEHReturn: true
# FULL: callsUnwindInit: false
-# FULL: hasEHCatchret: true
+# FULL: hasEHContTarget: true
# FULL: hasEHScopes: false
# FULL: hasEHFunclets: false
# SIMPLE: callsEHReturn: true
# SIMPLE-NOT: callsUnwindInit
-# SIMPLE: hasEHCatchret: true
+# SIMPLE: hasEHContTarget: true
# SIMPLE-NOT hasEHScopes
# SIMPLE-NOT: hasEHFunclets
---
@@ -63,7 +63,7 @@ name: func2
tracksRegLiveness: true
callsEHReturn: true
callsUnwindInit: false
-hasEHCatchret: true
+hasEHContTarget: true
hasEHScopes: false
hasEHFunclets: false
body: |
diff --git a/llvm/test/CodeGen/MIR/X86/inline-asm-rm-exhaustion.mir b/llvm/test/CodeGen/MIR/X86/inline-asm-rm-exhaustion.mir
index 6ca19aba1a65d..e9e35ac8da986 100644
--- a/llvm/test/CodeGen/MIR/X86/inline-asm-rm-exhaustion.mir
+++ b/llvm/test/CodeGen/MIR/X86/inline-asm-rm-exhaustion.mir
@@ -40,7 +40,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
@@ -103,7 +103,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
@@ -170,7 +170,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
diff --git a/llvm/test/CodeGen/NVPTX/proxy-reg-erasure.mir b/llvm/test/CodeGen/NVPTX/proxy-reg-erasure.mir
index b9975fd133d5c..fc60c056483ce 100644
--- a/llvm/test/CodeGen/NVPTX/proxy-reg-erasure.mir
+++ b/llvm/test/CodeGen/NVPTX/proxy-reg-erasure.mir
@@ -25,7 +25,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
diff --git a/llvm/test/CodeGen/PowerPC/ctrloop-do-not-duplicate-mi.mir b/llvm/test/CodeGen/PowerPC/ctrloop-do-not-duplicate-mi.mir
index d8bd70acbfae4..651869d667380 100644
--- a/llvm/test/CodeGen/PowerPC/ctrloop-do-not-duplicate-mi.mir
+++ b/llvm/test/CodeGen/PowerPC/ctrloop-do-not-duplicate-mi.mir
@@ -75,7 +75,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
failsVerification: false
diff --git a/llvm/test/CodeGen/PowerPC/peephole-replaceInstr-after-eliminate-extsw.mir b/llvm/test/CodeGen/PowerPC/peephole-replaceInstr-after-eliminate-extsw.mir
index 088bdb8f241f3..1d898a4d7ce9f 100644
--- a/llvm/test/CodeGen/PowerPC/peephole-replaceInstr-after-eliminate-extsw.mir
+++ b/llvm/test/CodeGen/PowerPC/peephole-replaceInstr-after-eliminate-extsw.mir
@@ -260,7 +260,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
diff --git a/llvm/test/CodeGen/RISCV/rvv/undef-earlyclobber-chain.mir b/llvm/test/CodeGen/RISCV/rvv/undef-earlyclobber-chain.mir
index 69078710e9ccf..9c23fd9902bb8 100644
--- a/llvm/test/CodeGen/RISCV/rvv/undef-earlyclobber-chain.mir
+++ b/llvm/test/CodeGen/RISCV/rvv/undef-earlyclobber-chain.mir
@@ -30,7 +30,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
diff --git a/llvm/test/CodeGen/RISCV/stack-slot-coloring.mir b/llvm/test/CodeGen/RISCV/stack-slot-coloring.mir
index 17bbcc2981bb8..4ea0270c6bc26 100644
--- a/llvm/test/CodeGen/RISCV/stack-slot-coloring.mir
+++ b/llvm/test/CodeGen/RISCV/stack-slot-coloring.mir
@@ -21,7 +21,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
failsVerification: false
diff --git a/llvm/test/CodeGen/Thumb2/LowOverheadLoops/mve-reduct-livein-arg.mir b/llvm/test/CodeGen/Thumb2/LowOverheadLoops/mve-reduct-livein-arg.mir
index e36a8e2b8c666..f5b341c381388 100644
--- a/llvm/test/CodeGen/Thumb2/LowOverheadLoops/mve-reduct-livein-arg.mir
+++ b/llvm/test/CodeGen/Thumb2/LowOverheadLoops/mve-reduct-livein-arg.mir
@@ -67,7 +67,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
failsVerification: false
diff --git a/llvm/test/CodeGen/Thumb2/constant-islands-no-split.mir b/llvm/test/CodeGen/Thumb2/constant-islands-no-split.mir
index 9283ef14ca6cb..494399a84f142 100644
--- a/llvm/test/CodeGen/Thumb2/constant-islands-no-split.mir
+++ b/llvm/test/CodeGen/Thumb2/constant-islands-no-split.mir
@@ -47,7 +47,7 @@ noVRegs: true
hasFakeUses: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
diff --git a/llvm/test/CodeGen/Thumb2/pipeliner-preserve-ties.mir b/llvm/test/CodeGen/Thumb2/pipeliner-preserve-ties.mir
index 6983c6f97cc81..4554f9f1fa23a 100644
--- a/llvm/test/CodeGen/Thumb2/pipeliner-preserve-ties.mir
+++ b/llvm/test/CodeGen/Thumb2/pipeliner-preserve-ties.mir
@@ -101,7 +101,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
failsVerification: false
diff --git a/llvm/test/CodeGen/WebAssembly/multivalue-dont-move-def-past-use.mir b/llvm/test/CodeGen/WebAssembly/multivalue-dont-move-def-past-use.mir
index eb9dfa9dfa60d..0dfae8059d8b7 100644
--- a/llvm/test/CodeGen/WebAssembly/multivalue-dont-move-def-past-use.mir
+++ b/llvm/test/CodeGen/WebAssembly/multivalue-dont-move-def-past-use.mir
@@ -40,7 +40,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
failsVerification: false
diff --git a/llvm/test/CodeGen/X86/align-basic-block-sections.mir b/llvm/test/CodeGen/X86/align-basic-block-sections.mir
index 7521341ff3ea0..17a675f5c5b72 100644
--- a/llvm/test/CodeGen/X86/align-basic-block-sections.mir
+++ b/llvm/test/CodeGen/X86/align-basic-block-sections.mir
@@ -56,7 +56,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
failsVerification: false
diff --git a/llvm/test/CodeGen/X86/amx_tile_pair_configure_O0.mir b/llvm/test/CodeGen/X86/amx_tile_pair_configure_O0.mir
index dc79134321e9c..7f862db421686 100644
--- a/llvm/test/CodeGen/X86/amx_tile_pair_configure_O0.mir
+++ b/llvm/test/CodeGen/X86/amx_tile_pair_configure_O0.mir
@@ -14,7 +14,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
failsVerification: false
diff --git a/llvm/test/CodeGen/X86/amx_tile_pair_configure_O2.mir b/llvm/test/CodeGen/X86/amx_tile_pair_configure_O2.mir
index e62a52162d523..3a03fbe6ec72c 100644
--- a/llvm/test/CodeGen/X86/amx_tile_pair_configure_O2.mir
+++ b/llvm/test/CodeGen/X86/amx_tile_pair_configure_O2.mir
@@ -49,7 +49,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
failsVerification: false
diff --git a/llvm/test/CodeGen/X86/amx_tile_pair_copy.mir b/llvm/test/CodeGen/X86/amx_tile_pair_copy.mir
index 857ad433af153..a19ff2ad47e7c 100644
--- a/llvm/test/CodeGen/X86/amx_tile_pair_copy.mir
+++ b/llvm/test/CodeGen/X86/amx_tile_pair_copy.mir
@@ -14,7 +14,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
failsVerification: false
diff --git a/llvm/test/CodeGen/X86/amx_tile_pair_preconfigure_O0.mir b/llvm/test/CodeGen/X86/amx_tile_pair_preconfigure_O0.mir
index cdc525193fef7..e3f15c6c1f295 100644
--- a/llvm/test/CodeGen/X86/amx_tile_pair_preconfigure_O0.mir
+++ b/llvm/test/CodeGen/X86/amx_tile_pair_preconfigure_O0.mir
@@ -14,7 +14,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
failsVerification: false
diff --git a/llvm/test/CodeGen/X86/amx_tile_pair_preconfigure_O2.mir b/llvm/test/CodeGen/X86/amx_tile_pair_preconfigure_O2.mir
index a9824dcac6b04..89f6773157508 100644
--- a/llvm/test/CodeGen/X86/amx_tile_pair_preconfigure_O2.mir
+++ b/llvm/test/CodeGen/X86/amx_tile_pair_preconfigure_O2.mir
@@ -14,7 +14,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
failsVerification: false
diff --git a/llvm/test/CodeGen/X86/apx/domain-reassignment.mir b/llvm/test/CodeGen/X86/apx/domain-reassignment.mir
index 49af7a6c949a1..e478e66c24dbe 100644
--- a/llvm/test/CodeGen/X86/apx/domain-reassignment.mir
+++ b/llvm/test/CodeGen/X86/apx/domain-reassignment.mir
@@ -878,7 +878,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
diff --git a/llvm/test/CodeGen/X86/apx/memfold-nd2rmw.mir b/llvm/test/CodeGen/X86/apx/memfold-nd2rmw.mir
index 4718dfd597d2a..54e140686876f 100644
--- a/llvm/test/CodeGen/X86/apx/memfold-nd2rmw.mir
+++ b/llvm/test/CodeGen/X86/apx/memfold-nd2rmw.mir
@@ -67,7 +67,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
diff --git a/llvm/test/CodeGen/X86/basic-block-address-map-mir-parse.mir b/llvm/test/CodeGen/X86/basic-block-address-map-mir-parse.mir
index 86f5f27494ec4..8ac93c79fa5a2 100644
--- a/llvm/test/CodeGen/X86/basic-block-address-map-mir-parse.mir
+++ b/llvm/test/CodeGen/X86/basic-block-address-map-mir-parse.mir
@@ -66,7 +66,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
failsVerification: false
diff --git a/llvm/test/CodeGen/X86/break-false-dep-crash.mir b/llvm/test/CodeGen/X86/break-false-dep-crash.mir
index 588fbfb136dd4..713633c322890 100644
--- a/llvm/test/CodeGen/X86/break-false-dep-crash.mir
+++ b/llvm/test/CodeGen/X86/break-false-dep-crash.mir
@@ -64,7 +64,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
diff --git a/llvm/test/CodeGen/X86/callbr-asm-outputs-regallocfast.mir b/llvm/test/CodeGen/X86/callbr-asm-outputs-regallocfast.mir
index 6263a3f09b0d3..1923114d0c297 100644
--- a/llvm/test/CodeGen/X86/callbr-asm-outputs-regallocfast.mir
+++ b/llvm/test/CodeGen/X86/callbr-asm-outputs-regallocfast.mir
@@ -62,7 +62,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
debugInstrRef: false
diff --git a/llvm/test/CodeGen/X86/cse-two-preds.mir b/llvm/test/CodeGen/X86/cse-two-preds.mir
index e6f04a6ce66d4..c821b3b94101d 100644
--- a/llvm/test/CodeGen/X86/cse-two-preds.mir
+++ b/llvm/test/CodeGen/X86/cse-two-preds.mir
@@ -50,7 +50,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
diff --git a/llvm/test/CodeGen/X86/domain-reassignment.mir b/llvm/test/CodeGen/X86/domain-reassignment.mir
index fc0f32c7d4a94..1889982ac2618 100644
--- a/llvm/test/CodeGen/X86/domain-reassignment.mir
+++ b/llvm/test/CodeGen/X86/domain-reassignment.mir
@@ -878,7 +878,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
diff --git a/llvm/test/CodeGen/X86/machine-licm-vs-wineh.mir b/llvm/test/CodeGen/X86/machine-licm-vs-wineh.mir
index 3582b178869c4..3496368940dfb 100644
--- a/llvm/test/CodeGen/X86/machine-licm-vs-wineh.mir
+++ b/llvm/test/CodeGen/X86/machine-licm-vs-wineh.mir
@@ -66,7 +66,7 @@
name: test
alignment: 16
tracksRegLiveness: true
-hasEHCatchret: true
+hasEHContTarget: true
hasEHScopes: true
hasEHFunclets: true
debugInstrRef: true
diff --git a/llvm/test/CodeGen/X86/peephole-test-after-add.mir b/llvm/test/CodeGen/X86/peephole-test-after-add.mir
index 5023c966d6a84..aeb9988b90d05 100644
--- a/llvm/test/CodeGen/X86/peephole-test-after-add.mir
+++ b/llvm/test/CodeGen/X86/peephole-test-after-add.mir
@@ -254,7 +254,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
@@ -379,7 +379,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
@@ -505,7 +505,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
diff --git a/llvm/test/CodeGen/X86/zero-call-used-regs-debug-info.mir b/llvm/test/CodeGen/X86/zero-call-used-regs-debug-info.mir
index 68505b6d94528..35eeede9da203 100644
--- a/llvm/test/CodeGen/X86/zero-call-used-regs-debug-info.mir
+++ b/llvm/test/CodeGen/X86/zero-call-used-regs-debug-info.mir
@@ -90,7 +90,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
debugInstrRef: true
diff --git a/llvm/test/DebugInfo/ARM/move-dbg-values-imm-test.mir b/llvm/test/DebugInfo/ARM/move-dbg-values-imm-test.mir
index a6bc006c1fe42..99ec658527192 100644
--- a/llvm/test/DebugInfo/ARM/move-dbg-values-imm-test.mir
+++ b/llvm/test/DebugInfo/ARM/move-dbg-values-imm-test.mir
@@ -63,7 +63,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
diff --git a/llvm/test/DebugInfo/MIR/X86/instr-ref-join-def-vphi.mir b/llvm/test/DebugInfo/MIR/X86/instr-ref-join-def-vphi.mir
index b1531aa8ee878..aa6597f782856 100644
--- a/llvm/test/DebugInfo/MIR/X86/instr-ref-join-def-vphi.mir
+++ b/llvm/test/DebugInfo/MIR/X86/instr-ref-join-def-vphi.mir
@@ -124,7 +124,7 @@ tracksRegLiveness: true
hasWinCFI: true
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
failsVerification: false
diff --git a/llvm/test/DebugInfo/X86/instr-ref-track-clobbers.mir b/llvm/test/DebugInfo/X86/instr-ref-track-clobbers.mir
index 7ac5923464105..feeaaa70f008b 100644
--- a/llvm/test/DebugInfo/X86/instr-ref-track-clobbers.mir
+++ b/llvm/test/DebugInfo/X86/instr-ref-track-clobbers.mir
@@ -85,7 +85,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
failsVerification: false
diff --git a/llvm/test/MachineVerifier/verify-inlineasmbr.mir b/llvm/test/MachineVerifier/verify-inlineasmbr.mir
index fe54379c1bc76..d03582e16881c 100644
--- a/llvm/test/MachineVerifier/verify-inlineasmbr.mir
+++ b/llvm/test/MachineVerifier/verify-inlineasmbr.mir
@@ -68,7 +68,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
failsVerification: false
diff --git a/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-MIFlags.mir b/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-MIFlags.mir
index 162d8493037f9..ef6632711e463 100644
--- a/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-MIFlags.mir
+++ b/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-MIFlags.mir
@@ -21,7 +21,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
failsVerification: false
diff --git a/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-MIFlags.mir.expected b/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-MIFlags.mir.expected
index 39560a1e1ab0a..f4027c1e0db51 100644
--- a/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-MIFlags.mir.expected
+++ b/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-MIFlags.mir.expected
@@ -22,7 +22,7 @@ tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
failsVerification: false
diff --git a/llvm/test/tools/llvm-reduce/mir/preserve-func-info.mir b/llvm/test/tools/llvm-reduce/mir/preserve-func-info.mir
index cbddf89f3b47b..7bcfd31e40c5b 100644
--- a/llvm/test/tools/llvm-reduce/mir/preserve-func-info.mir
+++ b/llvm/test/tools/llvm-reduce/mir/preserve-func-info.mir
@@ -20,7 +20,7 @@
# RESULT-NEXT: hasFakeUses: true
# RESULT-NEXT: callsEHReturn: true
# RESULT-NEXT: callsUnwindInit: true
-# RESULT-NEXT: hasEHCatchret: true
+# RESULT-NEXT: hasEHContTarget: true
# RESULT-NEXT: hasEHScopes: true
# RESULT-NEXT: hasEHFunclets: true
# RESULT-NEXT: failsVerification: true
@@ -53,7 +53,7 @@ failsVerification: true
tracksDebugUserValues: true
callsEHReturn: true
callsUnwindInit: true
-hasEHCatchret: true
+hasEHContTarget: true
hasEHScopes: true
hasEHFunclets: true
diff --git a/llvm/tools/llvm-reduce/ReducerWorkItem.cpp b/llvm/tools/llvm-reduce/ReducerWorkItem.cpp
index 7cd974f0cf438..01fa2a33ec1f5 100644
--- a/llvm/tools/llvm-reduce/ReducerWorkItem.cpp
+++ b/llvm/tools/llvm-reduce/ReducerWorkItem.cpp
@@ -267,7 +267,7 @@ static std::unique_ptr<MachineFunction> cloneMF(MachineFunction *SrcMF,
DstMBB->setIsEHPad(SrcMBB.isEHPad());
DstMBB->setIsEHScopeEntry(SrcMBB.isEHScopeEntry());
- DstMBB->setIsEHCatchretTarget(SrcMBB.isEHCatchretTarget());
+ DstMBB->setIsEHContTarget(SrcMBB.isEHContTarget());
DstMBB->setIsEHFuncletEntry(SrcMBB.isEHFuncletEntry());
// FIXME: These are not serialized
@@ -394,13 +394,12 @@ static std::unique_ptr<MachineFunction> cloneMF(MachineFunction *SrcMF,
DstMF->getProperties().reset().set(SrcMF->getProperties());
if (!SrcMF->getFrameInstructions().empty() ||
- !SrcMF->getLongjmpTargets().empty() ||
- !SrcMF->getCatchretTargets().empty())
+ !SrcMF->getLongjmpTargets().empty() || !SrcMF->getEHContTargets().empty())
report_fatal_error("cloning not implemented for machine function property");
DstMF->setCallsEHReturn(SrcMF->callsEHReturn());
DstMF->setCallsUnwindInit(SrcMF->callsUnwindInit());
- DstMF->setHasEHCatchret(SrcMF->hasEHCatchret());
+ DstMF->setHasEHContTarget(SrcMF->hasEHContTarget());
DstMF->setHasEHScopes(SrcMF->hasEHScopes());
DstMF->setHasEHFunclets(SrcMF->hasEHFunclets());
DstMF->setHasFakeUses(SrcMF->hasFakeUses());
diff --git a/llvm/unittests/CodeGen/DroppedVariableStatsMIRTest.cpp b/llvm/unittests/CodeGen/DroppedVariableStatsMIRTest.cpp
index 157060ec4eebe..6a890387f23c1 100644
--- a/llvm/unittests/CodeGen/DroppedVariableStatsMIRTest.cpp
+++ b/llvm/unittests/CodeGen/DroppedVariableStatsMIRTest.cpp
@@ -126,7 +126,7 @@ noVRegs: false
hasFakeUses: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
@@ -275,7 +275,7 @@ noVRegs: false
hasFakeUses: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
@@ -418,7 +418,7 @@ noVRegs: false
hasFakeUses: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
@@ -561,7 +561,7 @@ noVRegs: false
hasFakeUses: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
@@ -706,7 +706,7 @@ noVRegs: false
hasFakeUses: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
@@ -851,7 +851,7 @@ noVRegs: false
hasFakeUses: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
@@ -997,7 +997,7 @@ noVRegs: false
hasFakeUses: false
callsEHReturn: false
callsUnwindInit: false
-hasEHCatchret: false
+hasEHContTarget: false
hasEHScopes: false
hasEHFunclets: false
isOutlined: false
diff --git a/llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
index 6125f0457933d..548ac41f43e5c 100644
--- a/llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
@@ -52,7 +52,7 @@ static_library("CodeGen") {
"DetectDeadLanes.cpp",
"DroppedVariableStatsMIR.cpp",
"DwarfEHPrepare.cpp",
- "EHContGuardCatchret.cpp",
+ "EHContGuardTargets.cpp",
"EarlyIfConversion.cpp",
"EdgeBundles.cpp",
"ExecutionDomainFix.cpp",
More information about the llvm-commits
mailing list