[llvm] Adding support in llvm-exegesis for Aarch64 for handling FPR64/128, PPR16 and ZPR128 reg class. (PR #127564)

[via llvm-commits]

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+# ppr register class initialization testcase 
+# ideally we should use PTRUE_{B/H?S/D} instead of FADDV_VPZ_D for isolated testcase; but exegesis does not support PTRUE_{B/H?S/D} yet;
+# RUN: llvm-exegesis -mcpu=neoverse-v2 -mode=latency -opcode-name=FADDV_VPZ_D 2>&1 | FileCheck %s --check-prefix=PPR
+# REQUIRES: aarch64-registered-target
+# PPR-NOT: setRegTo is not implemented, results will be unreliable
+# PPR: assembled_snippet: {{.*}}C0035FD6
+
+# zpr register class initialization testcase 
+# ideally we should use DUPM_ZI instead of FADDV_VPZ_S for isolated testcase; but exegesis does not support DUPM_ZI yet;
+# RUN: llvm-exegesis -mcpu=neoverse-v2 -mode=latency -opcode-name=FADDV_VPZ_S 2>&1 | FileCheck %s --check-prefix=ZPR
+# REQUIRES: aarch64-registered-target
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lakshayk-nv wrote:

Done. Thanks!

https://github.com/llvm/llvm-project/pull/127564