[llvm] 12b38c3 - TableGen: Fix comment typo

[Matt Arsenault via llvm-commits]

Author: Matt Arsenault
Date: 2025-03-04T10:30:14+07:00
New Revision: 12b38c3e39512344b9c951406c5023b8a5549182

URL: https://github.com/llvm/llvm-project/commit/12b38c3e39512344b9c951406c5023b8a5549182
DIFF: https://github.com/llvm/llvm-project/commit/12b38c3e39512344b9c951406c5023b8a5549182.diff

LOG: TableGen: Fix comment typo

Added: 
    

Modified: 
    llvm/utils/TableGen/Common/CodeGenRegisters.cpp

Removed: 
    


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diff  --git a/llvm/utils/TableGen/Common/CodeGenRegisters.cpp b/llvm/utils/TableGen/Common/CodeGenRegisters.cpp
index 973c86c6e5a55..e732bbcf525e9 100644
--- a/llvm/utils/TableGen/Common/CodeGenRegisters.cpp
+++ b/llvm/utils/TableGen/Common/CodeGenRegisters.cpp
@@ -2004,7 +2004,7 @@ void CodeGenRegBank::pruneUnitSets() {
 // Create a RegUnitSet for each RegClass that contains all units in the class
 // including adopted units that are necessary to model register pressure. Then
 // iteratively compute RegUnitSets such that the union of any two overlapping
-// RegUnitSets is repreresented.
+// RegUnitSets is represented.
 //
 // RegisterInfoEmitter will map each RegClass to its RegUnitClass and any
 // RegUnitSet that is a superset of that RegUnitClass.