[llvm] dd9bb32 - [MachineCSE] Const correct some function arguments. NFC

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2025-03-02T22:33:26-08:00
New Revision: dd9bb32b9774f0e993837081a79d08e11cfeda02

URL: https://github.com/llvm/llvm-project/commit/dd9bb32b9774f0e993837081a79d08e11cfeda02
DIFF: https://github.com/llvm/llvm-project/commit/dd9bb32b9774f0e993837081a79d08e11cfeda02.diff

LOG: [MachineCSE] Const correct some function arguments. NFC

Added: 
    

Modified: 
    llvm/lib/CodeGen/MachineCSE.cpp

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/MachineCSE.cpp b/llvm/lib/CodeGen/MachineCSE.cpp
index b70d50ce2d8ba..6d14509c5934f 100644
--- a/llvm/lib/CodeGen/MachineCSE.cpp
+++ b/llvm/lib/CodeGen/MachineCSE.cpp
@@ -110,8 +110,8 @@ class MachineCSEImpl {
                              SmallSet<MCRegister, 8> &PhysRefs,
                              PhysDefVector &PhysDefs, bool &PhysUseDef) const;
   bool PhysRegDefsReach(MachineInstr *CSMI, MachineInstr *MI,
-                        SmallSet<MCRegister, 8> &PhysRefs,
-                        PhysDefVector &PhysDefs, bool &NonLocal) const;
+                        const SmallSet<MCRegister, 8> &PhysRefs,
+                        const PhysDefVector &PhysDefs, bool &NonLocal) const;
   bool isCSECandidate(MachineInstr *MI);
   bool isProfitableToCSE(Register CSReg, Register Reg, MachineBasicBlock *CSBB,
                          MachineInstr *MI);
@@ -334,8 +334,8 @@ bool MachineCSEImpl::hasLivePhysRegDefUses(const MachineInstr *MI,
 }
 
 bool MachineCSEImpl::PhysRegDefsReach(MachineInstr *CSMI, MachineInstr *MI,
-                                      SmallSet<MCRegister, 8> &PhysRefs,
-                                      PhysDefVector &PhysDefs,
+                                      const SmallSet<MCRegister, 8> &PhysRefs,
+                                      const PhysDefVector &PhysDefs,
                                       bool &NonLocal) const {
   // For now conservatively returns false if the common subexpression is
   // not in the same basic block as the given instruction. The only exception