[llvm] [RISCV][MCA] Pick the correct VPseudo sched class for indexed memory operation (PR #128978)

[Craig Topper via llvm-commits]

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@@ -14,12 +14,33 @@
 #include "RISCVCustomBehaviour.h"
 #include "MCTargetDesc/RISCVMCTargetDesc.h"
 #include "RISCV.h"
+#include "RISCVISelDAGToDAG.h"
 #include "TargetInfo/RISCVTargetInfo.h"
 #include "llvm/MC/TargetRegistry.h"
 #include "llvm/Support/Debug.h"
 
 #define DEBUG_TYPE "llvm-mca-riscv-custombehaviour"
 
+namespace llvm::RISCV::mca {
+struct VXMemOpInfo {
+  unsigned Log2IdxEEW : 3;
+  unsigned IsOrdered : 1;
+  unsigned IsStore : 1;
+  unsigned NF : 4;
+  unsigned BaseInstr;
+};
+
+#define GET_RISCVBaseVXMemOpTable_DECL
+#define GET_RISCVBaseVXMemOpTable_IMPL
+// We need to include the implementation code here because RISCVCustomBehavior
+// is not linked against RISCVCodeGen.
+#define GET_RISCVVLXSEGTable_IMPL
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topperc wrote:

So the declarations are in `llvm::RISCV` namespace but the implementations are in `llvm::RISCV::mca`? How does that even work?

https://github.com/llvm/llvm-project/pull/128978