[llvm] [ConstraintElim] Teach checkAndReplaceCondition about samesign (PR #128168)

Florian Hahn via llvm-commits llvm-commits at lists.llvm.org
Mon Feb 24 04:18:38 PST 2025


https://github.com/fhahn approved this pull request.

LGTM, thanks!

When landing, could you add a brief description to the commit message, perhaps including a link to an alive2 proof for the motivating example?

https://github.com/llvm/llvm-project/pull/128168


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