[llvm] [MachineScheduler] Fix physreg dependencies of ExitSU (PR #123541)

[Sergei Barannikov via llvm-commits]

================
@@ -263,6 +275,9 @@ void ScheduleDAGInstrs::addPhysRegDataDeps(SUnit *SU, unsigned OperIdx) {
       bool ImplicitPseudoUse = false;
       SDep Dep;
       if (UseOpIdx < 0) {
+        // FIXME: UseOpIdx can be passed to computeOperandLatency, which can
+        //   pass it to findUseIdx, which treats it as unsigned. If this is
+        //   the expected behavior, it should be commented.
----------------
s-barannikov wrote:

I'm not sure how to fix this.
For the reference, here is how the passed `UseOpIdx` is used in `findUseIdx()`:
```
static unsigned findUseIdx(const MachineInstr *MI, unsigned UseOperIdx) {
  unsigned UseIdx = 0;
  for (unsigned i = 0; i != UseOperIdx; ++i) {
    const MachineOperand &MO = MI->getOperand(i);
    if (MO.isReg() && MO.readsReg() && !MO.isDef())
      ++UseIdx;
  }
  return UseIdx;
}
```
This code should crash if `UseOperIdx == -1`, except it doesn't. This function is only called (under certain conditions) if the target uses SchedModel (not Itineraries). Probably this code is unreachable for in-tree models.

Naively fixing this by setting `ImplicitPseudoUse` to true results in too many test failures (> 650) and crashes Hexagon quite badly.


https://github.com/llvm/llvm-project/pull/123541