[llvm] [AArch64] apple-m4 & apple-a15 have ADRP+ADD fusion (PR #123504)
Guy David via llvm-commits
llvm-commits at lists.llvm.org
Sun Jan 19 00:34:08 PST 2025
https://github.com/guy-david created https://github.com/llvm/llvm-project/pull/123504
None
>From a0865f5940f9a880b8229097c017f02a6799171a Mon Sep 17 00:00:00 2001
From: Guy David <guyda96 at gmail.com>
Date: Sun, 19 Jan 2025 10:26:56 +0200
Subject: [PATCH] [AArch64] apple-m4 & apple-a15 have ADRP+ADD fusion
---
llvm/lib/Target/AArch64/AArch64Processors.td | 2 ++
1 file changed, 2 insertions(+)
diff --git a/llvm/lib/Target/AArch64/AArch64Processors.td b/llvm/lib/Target/AArch64/AArch64Processors.td
index 364ab0d82bf888..8cff1931856001 100644
--- a/llvm/lib/Target/AArch64/AArch64Processors.td
+++ b/llvm/lib/Target/AArch64/AArch64Processors.td
@@ -363,6 +363,7 @@ def TuneAppleA15 : SubtargetFeature<"apple-a15", "ARMProcFamily", "AppleA15",
FeatureArithmeticCbzFusion,
FeatureDisableLatencySchedHeuristic,
FeatureFuseAddress,
+ FeatureFuseAdrpAdd,
FeatureFuseAES,
FeatureFuseArithmeticLogic,
FeatureFuseCCSelect,
@@ -413,6 +414,7 @@ def TuneAppleM4 : SubtargetFeature<"apple-m4", "ARMProcFamily", "AppleM4",
FeatureArithmeticCbzFusion,
FeatureDisableLatencySchedHeuristic,
FeatureFuseAddress,
+ FeatureFuseAdrpAdd,
FeatureFuseAES,
FeatureFuseArithmeticLogic,
FeatureFuseCCSelect,
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