[llvm] [AArch64] apple-m4 & apple-a15 have ADRP+ADD fusion (PR #123504)
via llvm-commits
llvm-commits at lists.llvm.org
Sun Jan 19 00:34:41 PST 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-aarch64
Author: Guy David (guy-david)
<details>
<summary>Changes</summary>
---
Full diff: https://github.com/llvm/llvm-project/pull/123504.diff
1 Files Affected:
- (modified) llvm/lib/Target/AArch64/AArch64Processors.td (+2)
``````````diff
diff --git a/llvm/lib/Target/AArch64/AArch64Processors.td b/llvm/lib/Target/AArch64/AArch64Processors.td
index 364ab0d82bf888..8cff1931856001 100644
--- a/llvm/lib/Target/AArch64/AArch64Processors.td
+++ b/llvm/lib/Target/AArch64/AArch64Processors.td
@@ -363,6 +363,7 @@ def TuneAppleA15 : SubtargetFeature<"apple-a15", "ARMProcFamily", "AppleA15",
FeatureArithmeticCbzFusion,
FeatureDisableLatencySchedHeuristic,
FeatureFuseAddress,
+ FeatureFuseAdrpAdd,
FeatureFuseAES,
FeatureFuseArithmeticLogic,
FeatureFuseCCSelect,
@@ -413,6 +414,7 @@ def TuneAppleM4 : SubtargetFeature<"apple-m4", "ARMProcFamily", "AppleM4",
FeatureArithmeticCbzFusion,
FeatureDisableLatencySchedHeuristic,
FeatureFuseAddress,
+ FeatureFuseAdrpAdd,
FeatureFuseAES,
FeatureFuseArithmeticLogic,
FeatureFuseCCSelect,
``````````
</details>
https://github.com/llvm/llvm-project/pull/123504
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