[llvm] [GlobalISel][AArch64] Legalize G_FABS and G_FNEG for SVE (PR #114784)

[Craig Topper via llvm-commits]

Thorsten =?utf-8?q?Schütt?= <schuett at gmail.com>,
Thorsten =?utf-8?q?Schütt?= <schuett at gmail.com>,
Thorsten =?utf-8?q?Schütt?= <schuett at gmail.com>
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In-Reply-To: <llvm.org/llvm/llvm-project/pull/114784 at github.com>


topperc wrote:

> I bet the fixed length vectors are intrinsics. Either they are selected automatic already or we have to do the work in C++ in the selector.

They are not intrinsics. They are instruction like `add <8 x i32> %x, %y` that are wider than Neon types. They require -aarch64-sve-vector-bits-min=256 or a vscale_range attribute that indicates SVE vectors are at least 256. https://godbolt.org/z/q1G4vnj16

https://github.com/llvm/llvm-project/pull/114784