[llvm] [GlobalISel][AArch64] Legalize G_FABS and G_FNEG for SVE (PR #114784)

[Thorsten Schütt via llvm-commits]

tschuett wrote:

Unfortunately, it isn't. I can't see any effidence that @madhur13490 assigned the rfc or a plan for the documentation to any person or a community effort. However,  @aemerson forces me to do the work, which isn't appropriate.

Fixed vectors. In the patterns above there is  `PTRUE_D 31` on the predicate register, where `31` means `ALL`. All vector lanes are active. For fixed vectors, the dag uses ptrue with less active lanes. Selection might work in C++ by using ptrue with less active lanes. For the moment, I have no idea how to do that with patterns.

https://github.com/llvm/llvm-project/pull/114784