[llvm] [RISCV][VLOPT] Add vector indexed loads and stores to getOperandInfo (PR #119748)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 12 13:10:40 PST 2024
================
@@ -543,6 +543,36 @@ body: |
PseudoVSSE8_V_MF2 %x, $noreg, $noreg, 1, 3 /* e8 */
...
---
+name: vsuxeiN_v
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: vsuxeiN_v
+ ; CHECK: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, 1, 3 /* e8 */, 0 /* tu, mu */
+ ; CHECK-NEXT: PseudoVSUXEI8_V_M1_M1 %x, $noreg, $noreg, 1, 3 /* e8 */
+ %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 3 /* e8 */, 0
+ PseudoVSUXEI8_V_M1_M1 %x, $noreg, $noreg, 1, 3 /* e8 */
----------------
topperc wrote:
This only tests operand 0 and does test the index. Are you assuming that the index operand is covered by the load test?
https://github.com/llvm/llvm-project/pull/119748
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