[llvm] [RISCV][VLOPT] Add vector indexed loads and stores to getOperandInfo (PR #119748)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Thu Dec 12 13:07:01 PST 2024


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@@ -270,6 +270,42 @@ static OperandInfo getOperandInfo(const MachineInstr &MI,
   case RISCV::VSSE64_V:
     return OperandInfo(RISCVVType::getEMULEqualsEEWDivSEWTimesLMUL(6, MI), 6);
 
+  // Vector Indexed Instructions
+  // vs(o|u)xei<eew>.v
+  // Dest EEW=SEW, EMUL=LMUL. Source EEW=<eew> and EMUL=(EEW/SEW)*LMUL
+  case RISCV::VLUXEI8_V:
+  case RISCV::VLOXEI8_V:
+  case RISCV::VSUXEI8_V:
+  case RISCV::VSOXEI8_V: {
+    if (IsMODef)
----------------
topperc wrote:

IsMODef isn't named well for a store. It's not a def, but it happens to be operand 0 so it works.

https://github.com/llvm/llvm-project/pull/119748


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