[llvm] [RISCV][VLOPT] Add vector mask producing integer instructions to isSupportedInstr and getOperandInfo (PR #119733)

via llvm-commits llvm-commits at lists.llvm.org
Thu Dec 12 10:59:38 PST 2024


github-actions[bot] wrote:

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git-clang-format --diff 2e9bfcadbc25e8056ea8f7011786a835c3307a1b b9fbab701be9382053829a5da086521b6c3728a2 --extensions cpp -- llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp b/llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
index 7f08bd2973..66cfc0fa02 100644
--- a/llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
+++ b/llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
@@ -560,7 +560,7 @@ static OperandInfo getOperandInfo(const MachineInstr &MI,
   case RISCV::VMADC_VVM:
   case RISCV::VMADC_VXM:
   case RISCV::VMSBC_VVM:
-  case RISCV::VMSBC_VXM: 
+  case RISCV::VMSBC_VXM:
   // Dest EEW=1 and EMUL=(EEW/SEW)*LMUL. Source EEW=SEW and EMUL=LMUL.
   case RISCV::VMADC_VV:
   case RISCV::VMADC_VI:

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https://github.com/llvm/llvm-project/pull/119733


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