[llvm] [BOLT][AArch64] Fix strict usage during ADR Relax (PR #71377)

[Maksim Panchenko via llvm-commits]

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@@ -72,14 +72,17 @@ void ADRRelaxationPass::runOnFunction(BinaryFunction &BF) {
 
       if (It != BB.begin() && BC.MIB->isNoop(*std::prev(It))) {
         It = BB.eraseInstruction(std::prev(It));
-      } else if (opts::StrictMode && !BF.isSimple()) {
+      } else if (std::next(It) != BB.end() && BC.MIB->isNoop(*std::next(It))) {
+        BB.eraseInstruction(std::next(It));
+      } else if (!opts::StrictMode && !BF.isSimple()) {
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maksfb wrote:

I see. The original check was added by @treapster in https://reviews.llvm.org/D143887, and I believe the intent was to put more strict requirements on the binary (?). Anyway, if there are no objections, I'm going to remove the `StrictMode` check here and always issue an error if we can't update non-simple functions without changing instruction offsets.

https://github.com/llvm/llvm-project/pull/71377