[llvm] [docs] Add guide for Undefined Behavior (PR #119220)

[Nikita Popov via llvm-commits]

nikic wrote:

> I think having a section about APIs makes sense! For the and/or logic, do we have any API you want to mention? Or do you have an example off the top of your head that we can show?

For example, we can't transform:
```
define i1 @src(i32 %x, i32 %y) {
    %cmp1 = icmp ne i32 %x, 0
    %cmp2 = icmp ugt i32 %x, %y
    %and = select i1 %cmp1, i1 %cmp2, i1 false
    ret i1 %and
}

define i1 @tgt(i32 %x, i32 %y) {
    %cmp2 = icmp ugt i32 %x, %y
    ret i1 %cmp2
}
```

But we can do it for both of these:

```
define i1 @src2(i32 %x, i32 %y) {
    %cmp1 = icmp ne i32 %x, 0
    %cmp2 = icmp ugt i32 %x, %y
    %and = select i1 %cmp2, i1 %cmp1, i1 false
    ret i1 %and
}

define i1 @src3(i32 %x, i32 %y) {
    %cmp1 = icmp ne i32 %x, 0
    %cmp2 = icmp ugt i32 %x, %y
    %and = and i1 %cmp1, %cmp2
    ret i1 %and
}
```

The logical and/or form has asymmetric poison propagation limiting which transforms are valid.


https://github.com/llvm/llvm-project/pull/119220