[llvm] [RISCV] Set RegState for the stack-clash prologue registers (PR #119451)

via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 10 12:31:29 PST 2024


llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-risc-v

Author: Raphael Moreira Zinsly (rzinsly)

<details>
<summary>Changes</summary>

Set both prologue scratch registers as InternalRead for stack-clash protection to fix the tests with LLVM_ENABLE_EXPENSIVE_CHECKS.

See buildbot failure: https://lab.llvm.org/buildbot/#/builders/16/builds/10433

---
Full diff: https://github.com/llvm/llvm-project/pull/119451.diff


1 Files Affected:

- (modified) llvm/lib/Target/RISCV/RISCVFrameLowering.cpp (+2-2) 


``````````diff
diff --git a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
index 655de0b4e7eb5d..e7a477a6165606 100644
--- a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
@@ -2043,7 +2043,7 @@ static void emitStackProbeInline(MachineFunction &MF, MachineBasicBlock &MBB,
   //   SUB SP, SP, ProbeSize
   BuildMI(*LoopTestMBB, LoopTestMBB->end(), DL, TII->get(RISCV::SUB), SPReg)
       .addReg(SPReg)
-      .addReg(ScratchReg)
+      .addReg(ScratchReg, RegState::InternalRead)
       .setMIFlags(Flags);
 
   //   s[d|w] zero, 0(sp)
@@ -2057,7 +2057,7 @@ static void emitStackProbeInline(MachineFunction &MF, MachineBasicBlock &MBB,
   //   BNE SP, TargetReg, LoopTest
   BuildMI(*LoopTestMBB, LoopTestMBB->end(), DL, TII->get(RISCV::BNE))
       .addReg(SPReg)
-      .addReg(TargetReg)
+      .addReg(TargetReg, RegState::InternalRead)
       .addMBB(LoopTestMBB)
       .setMIFlags(Flags);
 

``````````

</details>


https://github.com/llvm/llvm-project/pull/119451


More information about the llvm-commits mailing list