[llvm] [RISCV] Set RegState for the stack-clash prologue registers (PR #119451)

[Raphael Moreira Zinsly via llvm-commits]

https://github.com/rzinsly created https://github.com/llvm/llvm-project/pull/119451

Set both prologue scratch registers as InternalRead for stack-clash protection to fix the tests with LLVM_ENABLE_EXPENSIVE_CHECKS.

See buildbot failure: https://lab.llvm.org/buildbot/#/builders/16/builds/10433

>From d4b1f8254f8fd7dee06ffa5fab25c00e5efe9e7f Mon Sep 17 00:00:00 2001
From: Raphael Moreira Zinsly <rzinsly at ventanamicro.com>
Date: Tue, 10 Dec 2024 17:15:40 -0300
Subject: [PATCH] [RISCV] Set RegState for the stack-clash prologue registers

Set both prologue scratch registers as InternalRead for stack-clash
protection to fix the tests with LLVM_ENABLE_EXPENSIVE_CHECKS.

See buildbot failure: https://lab.llvm.org/buildbot/#/builders/16/builds/10433
---
 llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
index 655de0b4e7eb5d..e7a477a6165606 100644
--- a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
@@ -2043,7 +2043,7 @@ static void emitStackProbeInline(MachineFunction &MF, MachineBasicBlock &MBB,
   //   SUB SP, SP, ProbeSize
   BuildMI(*LoopTestMBB, LoopTestMBB->end(), DL, TII->get(RISCV::SUB), SPReg)
       .addReg(SPReg)
-      .addReg(ScratchReg)
+      .addReg(ScratchReg, RegState::InternalRead)
       .setMIFlags(Flags);
 
   //   s[d|w] zero, 0(sp)
@@ -2057,7 +2057,7 @@ static void emitStackProbeInline(MachineFunction &MF, MachineBasicBlock &MBB,
   //   BNE SP, TargetReg, LoopTest
   BuildMI(*LoopTestMBB, LoopTestMBB->end(), DL, TII->get(RISCV::BNE))
       .addReg(SPReg)
-      .addReg(TargetReg)
+      .addReg(TargetReg, RegState::InternalRead)
       .addMBB(LoopTestMBB)
       .setMIFlags(Flags);