[llvm] 6106422 - [SROA] Escaping readonly nocapture tests. NFC
David Green via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 10 10:08:01 PST 2024
Author: David Green
Date: 2024-12-10T18:07:54Z
New Revision: 6106422ddbae0609be9582e65e750bb0bc741b3c
URL: https://github.com/llvm/llvm-project/commit/6106422ddbae0609be9582e65e750bb0bc741b3c
DIFF: https://github.com/llvm/llvm-project/commit/6106422ddbae0609be9582e65e750bb0bc741b3c.diff
LOG: [SROA] Escaping readonly nocapture tests. NFC
Added:
llvm/test/Transforms/SROA/readonlynocapture.ll
Modified:
llvm/test/Transforms/SROA/non-capturing-call-readonly.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/SROA/non-capturing-call-readonly.ll b/llvm/test/Transforms/SROA/non-capturing-call-readonly.ll
index 3756afadbf884a..87862b929a7511 100644
--- a/llvm/test/Transforms/SROA/non-capturing-call-readonly.ll
+++ b/llvm/test/Transforms/SROA/non-capturing-call-readonly.ll
@@ -364,12 +364,12 @@ define i32 @alloca_used_in_maybe_throwing_call(ptr %data, i64 %n) personality pt
; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
; CHECK: exit:
; CHECK-NEXT: [[I0:%.*]] = invoke i32 @user_of_alloca(ptr [[RETVAL]])
-; CHECK-NEXT: to label [[CONT:%.*]] unwind label [[UW:%.*]]
+; CHECK-NEXT: to label [[CONT:%.*]] unwind label [[UW:%.*]]
; CHECK: cont:
; CHECK-NEXT: br label [[END:%.*]]
; CHECK: uw:
; CHECK-NEXT: [[I1:%.*]] = landingpad { ptr, i32 }
-; CHECK-NEXT: catch ptr null
+; CHECK-NEXT: catch ptr null
; CHECK-NEXT: br label [[END]]
; CHECK: end:
; CHECK-NEXT: [[I2:%.*]] = load i32, ptr [[RETVAL]], align 4
@@ -424,10 +424,10 @@ define i32 @alloca_used_in_maybe_throwing_call_with_same_dests(ptr %data, i64 %n
; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
; CHECK: exit:
; CHECK-NEXT: [[I0:%.*]] = invoke i32 @user_of_alloca(ptr [[RETVAL]])
-; CHECK-NEXT: to label [[END:%.*]] unwind label [[UW:%.*]]
+; CHECK-NEXT: to label [[END:%.*]] unwind label [[UW:%.*]]
; CHECK: uw:
; CHECK-NEXT: [[I1:%.*]] = landingpad { ptr, i32 }
-; CHECK-NEXT: catch ptr null
+; CHECK-NEXT: catch ptr null
; CHECK-NEXT: br label [[END]]
; CHECK: end:
; CHECK-NEXT: [[I2:%.*]] = load i32, ptr [[RETVAL]], align 4
diff --git a/llvm/test/Transforms/SROA/readonlynocapture.ll b/llvm/test/Transforms/SROA/readonlynocapture.ll
new file mode 100644
index 00000000000000..2d02996d806ed2
--- /dev/null
+++ b/llvm/test/Transforms/SROA/readonlynocapture.ll
@@ -0,0 +1,358 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -passes=sroa -S | FileCheck %s
+
+declare void @callee(ptr nocapture readonly %p)
+
+define i32 @simple() {
+; CHECK-LABEL: @simple(
+; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
+; CHECK-NEXT: store i32 0, ptr [[A]], align 4
+; CHECK-NEXT: call void @callee(ptr [[A]])
+; CHECK-NEXT: [[L1:%.*]] = load i32, ptr [[A]], align 4
+; CHECK-NEXT: ret i32 [[L1]]
+;
+ %a = alloca i32
+ store i32 0, ptr %a
+ call void @callee(ptr %a)
+ %l1 = load i32, ptr %a
+ ret i32 %l1
+}
+
+define i32 @smallbig() {
+; CHECK-LABEL: @smallbig(
+; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
+; CHECK-NEXT: store i8 0, ptr [[A]], align 1
+; CHECK-NEXT: call void @callee(ptr [[A]])
+; CHECK-NEXT: [[L1:%.*]] = load i32, ptr [[A]], align 4
+; CHECK-NEXT: ret i32 [[L1]]
+;
+ %a = alloca i32
+ store i8 0, ptr %a
+ call void @callee(ptr %a)
+ %l1 = load i32, ptr %a
+ ret i32 %l1
+}
+
+define i32 @twoalloc() {
+; CHECK-LABEL: @twoalloc(
+; CHECK-NEXT: [[A:%.*]] = alloca { i32, i32 }, align 8
+; CHECK-NEXT: store i32 0, ptr [[A]], align 4
+; CHECK-NEXT: [[B:%.*]] = getelementptr i32, ptr [[A]], i32 1
+; CHECK-NEXT: store i32 1, ptr [[B]], align 4
+; CHECK-NEXT: call void @callee(ptr [[A]])
+; CHECK-NEXT: [[L1:%.*]] = load i32, ptr [[A]], align 4
+; CHECK-NEXT: [[L2:%.*]] = load i32, ptr [[B]], align 4
+; CHECK-NEXT: [[R:%.*]] = add i32 [[L1]], [[L2]]
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %a = alloca {i32, i32}
+ store i32 0, ptr %a
+ %b = getelementptr i32, ptr %a, i32 1
+ store i32 1, ptr %b
+ call void @callee(ptr %a)
+ %l1 = load i32, ptr %a
+ %l2 = load i32, ptr %b
+ %r = add i32 %l1, %l2
+ ret i32 %r
+}
+
+define i32 @twostore() {
+; CHECK-LABEL: @twostore(
+; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
+; CHECK-NEXT: store i32 1, ptr [[A]], align 4
+; CHECK-NEXT: call void @callee(ptr [[A]])
+; CHECK-NEXT: store i32 2, ptr [[A]], align 4
+; CHECK-NEXT: [[L:%.*]] = load i32, ptr [[A]], align 4
+; CHECK-NEXT: ret i32 [[L]]
+;
+ %a = alloca i32
+ store i32 1, ptr %a
+ call void @callee(ptr %a)
+ store i32 2, ptr %a
+ %l = load i32, ptr %a
+ ret i32 %l
+}
+
+define float @
diff erenttype() {
+; CHECK-LABEL: @
diff erenttype(
+; CHECK-NEXT: [[A:%.*]] = alloca { i32, i32 }, align 8
+; CHECK-NEXT: [[B:%.*]] = getelementptr i32, ptr [[A]], i32 1
+; CHECK-NEXT: store i32 1, ptr [[B]], align 4
+; CHECK-NEXT: call void @callee(ptr [[A]])
+; CHECK-NEXT: [[L2:%.*]] = load float, ptr [[B]], align 4
+; CHECK-NEXT: ret float [[L2]]
+;
+ %a = alloca {i32, i32}
+ %b = getelementptr i32, ptr %a, i32 1
+ store i32 1, ptr %b
+ call void @callee(ptr %a)
+ %l2 = load float, ptr %b
+ ret float %l2
+}
+
+define i32 @twoalloc_store64(i64 %x) {
+; CHECK-LABEL: @twoalloc_store64(
+; CHECK-NEXT: [[A:%.*]] = alloca i64, align 8
+; CHECK-NEXT: store i64 [[X:%.*]], ptr [[A]], align 4
+; CHECK-NEXT: call void @callee(ptr [[A]])
+; CHECK-NEXT: [[L1:%.*]] = load i32, ptr [[A]], align 4
+; CHECK-NEXT: [[B:%.*]] = getelementptr i32, ptr [[A]], i32 1
+; CHECK-NEXT: [[L2:%.*]] = load i32, ptr [[B]], align 4
+; CHECK-NEXT: ret i32 [[L2]]
+;
+ %a = alloca i64
+ store i64 %x, ptr %a
+ call void @callee(ptr %a)
+ %l1 = load i32, ptr %a
+ %b = getelementptr i32, ptr %a, i32 1
+ %l2 = load i32, ptr %b
+ ret i32 %l2
+}
+
+define i32 @twocalls() {
+; CHECK-LABEL: @twocalls(
+; CHECK-NEXT: [[A:%.*]] = alloca { i32, i32 }, align 8
+; CHECK-NEXT: store i32 0, ptr [[A]], align 4
+; CHECK-NEXT: [[B:%.*]] = getelementptr i32, ptr [[A]], i32 1
+; CHECK-NEXT: store i32 1, ptr [[B]], align 4
+; CHECK-NEXT: call void @callee(ptr [[A]])
+; CHECK-NEXT: [[L1:%.*]] = load i32, ptr [[A]], align 4
+; CHECK-NEXT: call void @callee(ptr [[A]])
+; CHECK-NEXT: [[L2:%.*]] = load i32, ptr [[B]], align 4
+; CHECK-NEXT: [[R:%.*]] = add i32 [[L1]], [[L2]]
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %a = alloca {i32, i32}
+ store i32 0, ptr %a
+ %b = getelementptr i32, ptr %a, i32 1
+ store i32 1, ptr %b
+ call void @callee(ptr %a)
+ %l1 = load i32, ptr %a
+ call void @callee(ptr %a)
+ %l2 = load i32, ptr %b
+ %r = add i32 %l1, %l2
+ ret i32 %r
+}
+
+define i32 @volatile() {
+; CHECK-LABEL: @volatile(
+; CHECK-NEXT: [[A:%.*]] = alloca { i32, i32 }, align 8
+; CHECK-NEXT: store i32 0, ptr [[A]], align 4
+; CHECK-NEXT: [[B:%.*]] = getelementptr i32, ptr [[A]], i32 1
+; CHECK-NEXT: store volatile i32 1, ptr [[B]], align 4
+; CHECK-NEXT: call void @callee(ptr [[A]])
+; CHECK-NEXT: [[L1:%.*]] = load volatile i32, ptr [[A]], align 4
+; CHECK-NEXT: [[L2:%.*]] = load i32, ptr [[B]], align 4
+; CHECK-NEXT: [[R:%.*]] = add i32 [[L1]], [[L2]]
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %a = alloca {i32, i32}
+ store i32 0, ptr %a
+ %b = getelementptr i32, ptr %a, i32 1
+ store volatile i32 1, ptr %b
+ call void @callee(ptr %a)
+ %l1 = load volatile i32, ptr %a
+ %l2 = load i32, ptr %b
+ %r = add i32 %l1, %l2
+ ret i32 %r
+}
+
+define i32 @atomic() {
+; CHECK-LABEL: @atomic(
+; CHECK-NEXT: [[A:%.*]] = alloca { i32, i32 }, align 8
+; CHECK-NEXT: store i32 0, ptr [[A]], align 4
+; CHECK-NEXT: [[B:%.*]] = getelementptr i32, ptr [[A]], i32 1
+; CHECK-NEXT: store i32 1, ptr [[B]], align 4
+; CHECK-NEXT: call void @callee(ptr [[A]])
+; CHECK-NEXT: [[L1:%.*]] = load atomic i32, ptr [[A]] seq_cst, align 4
+; CHECK-NEXT: [[L2:%.*]] = load i32, ptr [[B]], align 4
+; CHECK-NEXT: [[R:%.*]] = add i32 [[L1]], [[L2]]
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %a = alloca {i32, i32}
+ store i32 0, ptr %a
+ %b = getelementptr i32, ptr %a, i32 1
+ store i32 1, ptr %b
+ call void @callee(ptr %a)
+ %l1 = load atomic i32, ptr %a seq_cst, align 4
+ %l2 = load i32, ptr %b
+ %r = add i32 %l1, %l2
+ ret i32 %r
+}
+
+define i32 @notdominating() {
+; CHECK-LABEL: @notdominating(
+; CHECK-NEXT: [[A:%.*]] = alloca { i32, i32 }, align 8
+; CHECK-NEXT: [[B:%.*]] = getelementptr i32, ptr [[A]], i32 1
+; CHECK-NEXT: [[L1:%.*]] = load i32, ptr [[A]], align 4
+; CHECK-NEXT: [[L2:%.*]] = load i32, ptr [[B]], align 4
+; CHECK-NEXT: store i32 0, ptr [[A]], align 4
+; CHECK-NEXT: store i32 1, ptr [[B]], align 4
+; CHECK-NEXT: call void @callee(ptr [[A]])
+; CHECK-NEXT: [[R:%.*]] = add i32 [[L1]], [[L2]]
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %a = alloca {i32, i32}
+ %b = getelementptr i32, ptr %a, i32 1
+ %l1 = load i32, ptr %a
+ %l2 = load i32, ptr %b
+ store i32 0, ptr %a
+ store i32 1, ptr %b
+ call void @callee(ptr %a)
+ %r = add i32 %l1, %l2
+ ret i32 %r
+}
+
+declare void @callee_notreadonly(ptr %p)
+define i32 @notreadonly() {
+; CHECK-LABEL: @notreadonly(
+; CHECK-NEXT: [[A:%.*]] = alloca { i32, i32 }, align 8
+; CHECK-NEXT: store i32 0, ptr [[A]], align 4
+; CHECK-NEXT: [[B:%.*]] = getelementptr i32, ptr [[A]], i32 1
+; CHECK-NEXT: store i32 1, ptr [[B]], align 4
+; CHECK-NEXT: call void @callee_notreadonly(ptr [[A]])
+; CHECK-NEXT: [[L1:%.*]] = load i32, ptr [[A]], align 4
+; CHECK-NEXT: [[L2:%.*]] = load i32, ptr [[B]], align 4
+; CHECK-NEXT: [[R:%.*]] = add i32 [[L1]], [[L2]]
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %a = alloca {i32, i32}
+ store i32 0, ptr %a
+ %b = getelementptr i32, ptr %a, i32 1
+ store i32 1, ptr %b
+ call void @callee_notreadonly(ptr %a)
+ %l1 = load i32, ptr %a
+ %l2 = load i32, ptr %b
+ %r = add i32 %l1, %l2
+ ret i32 %r
+}
+
+declare void @callee_multiuse(ptr nocapture readonly %p, ptr nocapture readonly %q)
+define i32 @multiuse() {
+; CHECK-LABEL: @multiuse(
+; CHECK-NEXT: [[A:%.*]] = alloca { i32, i32 }, align 8
+; CHECK-NEXT: store i32 0, ptr [[A]], align 4
+; CHECK-NEXT: [[B:%.*]] = getelementptr i32, ptr [[A]], i32 1
+; CHECK-NEXT: store i32 1, ptr [[B]], align 4
+; CHECK-NEXT: call void @callee_multiuse(ptr [[A]], ptr [[A]])
+; CHECK-NEXT: [[L1:%.*]] = load i32, ptr [[A]], align 4
+; CHECK-NEXT: [[L2:%.*]] = load i32, ptr [[B]], align 4
+; CHECK-NEXT: [[R:%.*]] = add i32 [[L1]], [[L2]]
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %a = alloca {i32, i32}
+ store i32 0, ptr %a
+ %b = getelementptr i32, ptr %a, i32 1
+ store i32 1, ptr %b
+ call void @callee_multiuse(ptr %a, ptr %a)
+ %l1 = load i32, ptr %a
+ %l2 = load i32, ptr %b
+ %r = add i32 %l1, %l2
+ ret i32 %r
+}
+
+define i32 @memcpyed(ptr %src) {
+; CHECK-LABEL: @memcpyed(
+; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
+; CHECK-NEXT: store i32 0, ptr [[A]], align 4
+; CHECK-NEXT: call void @callee(ptr [[A]])
+; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr [[A]], ptr [[SRC:%.*]], i64 4, i1 false)
+; CHECK-NEXT: [[L1:%.*]] = load i32, ptr [[A]], align 4
+; CHECK-NEXT: ret i32 [[L1]]
+;
+ %a = alloca i32
+ store i32 0, ptr %a
+ call void @callee(ptr %a)
+ call void @llvm.memcpy.p0.p0.i64(ptr %a, ptr %src, i64 4, i1 false)
+ %l1 = load i32, ptr %a
+ ret i32 %l1
+}
+
+define ptr @memcpyedsplit(ptr %src) {
+; CHECK-LABEL: @memcpyedsplit(
+; CHECK-NEXT: [[A:%.*]] = alloca { i64, i64 }, align 8
+; CHECK-NEXT: store i8 1, ptr [[A]], align 1
+; CHECK-NEXT: [[B:%.*]] = getelementptr i64, ptr [[A]], i32 1
+; CHECK-NEXT: store ptr null, ptr [[B]], align 8
+; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr [[A]], ptr [[SRC:%.*]], i64 16, i1 false)
+; CHECK-NEXT: call void @callee(ptr [[A]])
+; CHECK-NEXT: [[L1:%.*]] = load ptr, ptr [[B]], align 8
+; CHECK-NEXT: ret ptr [[L1]]
+;
+ %a = alloca { i64, i64 }
+ store i8 1, ptr %a
+ %b = getelementptr i64, ptr %a, i32 1
+ store ptr null, ptr %b
+ call void @llvm.memcpy.p0.p0.i64(ptr %a, ptr %src, i64 16, i1 false)
+ call void @callee(ptr %a)
+ %l1 = load ptr, ptr %b
+ ret ptr %l1
+}
+
+; This struct contains padding bits. The load should not be replaced by poison.
+%struct.LoadImmediateInfo = type { i32 }
+define void @incompletestruct(i1 %b, i1 %c) {
+; CHECK-LABEL: @incompletestruct(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[LII:%.*]] = alloca [[STRUCT_LOADIMMEDIATEINFO:%.*]], align 4
+; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[LII]])
+; CHECK-NEXT: [[BF_LOAD:%.*]] = load i32, ptr [[LII]], align 4
+; CHECK-NEXT: [[BF_CLEAR4:%.*]] = and i32 [[BF_LOAD]], -262144
+; CHECK-NEXT: [[BF_SET5:%.*]] = select i1 [[B:%.*]], i32 196608, i32 131072
+; CHECK-NEXT: [[BF_SET12:%.*]] = or disjoint i32 [[BF_SET5]], [[BF_CLEAR4]]
+; CHECK-NEXT: store i32 [[BF_SET12]], ptr [[LII]], align 4
+; CHECK-NEXT: call void @callee(ptr [[LII]])
+; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr nonnull [[LII]])
+; CHECK-NEXT: ret void
+;
+entry:
+ %LII = alloca %struct.LoadImmediateInfo, align 4
+ call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %LII)
+ %bf.load = load i32, ptr %LII, align 4
+ %bf.clear4 = and i32 %bf.load, -262144
+ %bf.set5 = select i1 %b, i32 196608, i32 131072
+ %bf.set12 = or disjoint i32 %bf.set5, %bf.clear4
+ store i32 %bf.set12, ptr %LII, align 4
+ call void @callee(ptr %LII)
+ call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %LII)
+ ret void
+}
+
+define void @incompletestruct_bb(i1 %b, i1 %c) {
+; CHECK-LABEL: @incompletestruct_bb(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[LII:%.*]] = alloca [[STRUCT_LOADIMMEDIATEINFO:%.*]], align 4
+; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
+; CHECK: if.then:
+; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[LII]])
+; CHECK-NEXT: [[BF_LOAD:%.*]] = load i32, ptr [[LII]], align 4
+; CHECK-NEXT: [[BF_CLEAR4:%.*]] = and i32 [[BF_LOAD]], -262144
+; CHECK-NEXT: [[BF_SET5:%.*]] = select i1 [[B:%.*]], i32 196608, i32 131072
+; CHECK-NEXT: [[BF_SET12:%.*]] = or disjoint i32 [[BF_SET5]], [[BF_CLEAR4]]
+; CHECK-NEXT: store i32 [[BF_SET12]], ptr [[LII]], align 4
+; CHECK-NEXT: call void @callee(ptr [[LII]])
+; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr nonnull [[LII]])
+; CHECK-NEXT: br label [[IF_END]]
+; CHECK: if.end:
+; CHECK-NEXT: ret void
+;
+entry:
+ %LII = alloca %struct.LoadImmediateInfo, align 4
+ br i1 %c, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %LII)
+ %bf.load = load i32, ptr %LII, align 4
+ %bf.clear4 = and i32 %bf.load, -262144
+ %bf.set5 = select i1 %b, i32 196608, i32 131072
+ %bf.set12 = or disjoint i32 %bf.set5, %bf.clear4
+ store i32 %bf.set12, ptr %LII, align 4
+ call void @callee(ptr %LII)
+ call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %LII)
+ br label %if.end
+
+if.end: ; preds = %if.then, %entry
+ ret void
+}
+
+declare void @llvm.memcpy.p0.p0.i64(ptr, ptr, i64, i1)
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