[llvm] 1a5e18a - [HLSL] Do not print details in IR for target extension types (#115971)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 10 10:07:34 PST 2024
Author: Joshua Batista
Date: 2024-12-10T10:07:30-08:00
New Revision: 1a5e18a492481ff48ca764c8f7d08d231d922382
URL: https://github.com/llvm/llvm-project/commit/1a5e18a492481ff48ca764c8f7d08d231d922382
DIFF: https://github.com/llvm/llvm-project/commit/1a5e18a492481ff48ca764c8f7d08d231d922382.diff
LOG: [HLSL] Do not print details in IR for target extension types (#115971)
This PR changes how target extension types are printed when they are
emitted as IR.
This prevents repetitive phrases like "struct = type {...}" from being
repeated over and over in the outputted IR.
Additionally, it should allow opt to not crash when parsing the DXIL
output.
Fixes [#114131](https://github.com/llvm/llvm-project/issues/114131)
Added:
Modified:
clang/test/CodeGenHLSL/builtins/AppendStructuredBuffer-elementtype.hlsl
clang/test/CodeGenHLSL/builtins/ConsumeStructuredBuffer-elementtype.hlsl
clang/test/CodeGenHLSL/builtins/RasterizerOrderedStructuredBuffer-elementtype.hlsl
clang/test/CodeGenHLSL/builtins/hlsl_resource_t.hlsl
clang/test/CodeGenHLSL/resource-bindings.hlsl
llvm/lib/IR/AsmWriter.cpp
llvm/unittests/IR/TypesTest.cpp
Removed:
################################################################################
diff --git a/clang/test/CodeGenHLSL/builtins/AppendStructuredBuffer-elementtype.hlsl b/clang/test/CodeGenHLSL/builtins/AppendStructuredBuffer-elementtype.hlsl
index 1e8aae588fc33d..85face8eaeb6c8 100644
--- a/clang/test/CodeGenHLSL/builtins/AppendStructuredBuffer-elementtype.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/AppendStructuredBuffer-elementtype.hlsl
@@ -18,7 +18,8 @@ struct MyStruct {
// DXIL: %"class.hlsl::AppendStructuredBuffer.9" = type { target("dx.RawBuffer", <3 x i32>, 1, 0)
// DXIL: %"class.hlsl::AppendStructuredBuffer.10" = type { target("dx.RawBuffer", <2 x half>, 1, 0)
// DXIL: %"class.hlsl::AppendStructuredBuffer.11" = type { target("dx.RawBuffer", <3 x float>, 1, 0)
-// DXIL: %"class.hlsl::AppendStructuredBuffer.12" = type { target("dx.RawBuffer", %struct.MyStruct = type { <4 x float>, <2 x i32>, [8 x i8] }, 1, 0)
+// DXIL: %"class.hlsl::AppendStructuredBuffer.12" = type { target("dx.RawBuffer", %struct.MyStruct, 1, 0)
+// DXIL: %struct.MyStruct = type { <4 x float>, <2 x i32>, [8 x i8] }
AppendStructuredBuffer<int16_t> BufI16;
AppendStructuredBuffer<uint16_t> BufU16;
diff --git a/clang/test/CodeGenHLSL/builtins/ConsumeStructuredBuffer-elementtype.hlsl b/clang/test/CodeGenHLSL/builtins/ConsumeStructuredBuffer-elementtype.hlsl
index f8574c6460d4e1..5ed9e9ad8160ff 100644
--- a/clang/test/CodeGenHLSL/builtins/ConsumeStructuredBuffer-elementtype.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/ConsumeStructuredBuffer-elementtype.hlsl
@@ -18,7 +18,8 @@ struct MyStruct {
// DXIL: %"class.hlsl::ConsumeStructuredBuffer.9" = type { target("dx.RawBuffer", <3 x i32>, 1, 0)
// DXIL: %"class.hlsl::ConsumeStructuredBuffer.10" = type { target("dx.RawBuffer", <2 x half>, 1, 0)
// DXIL: %"class.hlsl::ConsumeStructuredBuffer.11" = type { target("dx.RawBuffer", <3 x float>, 1, 0)
-// DXIL: %"class.hlsl::ConsumeStructuredBuffer.12" = type { target("dx.RawBuffer", %struct.MyStruct = type { <4 x float>, <2 x i32>, [8 x i8] }, 1, 0)
+// DXIL: %"class.hlsl::ConsumeStructuredBuffer.12" = type { target("dx.RawBuffer", %struct.MyStruct, 1, 0)
+// DXIL: %struct.MyStruct = type { <4 x float>, <2 x i32>, [8 x i8] }
ConsumeStructuredBuffer<int16_t> BufI16;
ConsumeStructuredBuffer<uint16_t> BufU16;
diff --git a/clang/test/CodeGenHLSL/builtins/RasterizerOrderedStructuredBuffer-elementtype.hlsl b/clang/test/CodeGenHLSL/builtins/RasterizerOrderedStructuredBuffer-elementtype.hlsl
index 7057988de24b34..68d626de689f2e 100644
--- a/clang/test/CodeGenHLSL/builtins/RasterizerOrderedStructuredBuffer-elementtype.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/RasterizerOrderedStructuredBuffer-elementtype.hlsl
@@ -18,7 +18,7 @@ struct MyStruct {
// DXIL: %"class.hlsl::RasterizerOrderedStructuredBuffer.9" = type { target("dx.RawBuffer", <3 x i32>, 1, 1) }
// DXIL: %"class.hlsl::RasterizerOrderedStructuredBuffer.10" = type { target("dx.RawBuffer", <2 x half>, 1, 1) }
// DXIL: %"class.hlsl::RasterizerOrderedStructuredBuffer.11" = type { target("dx.RawBuffer", <3 x float>, 1, 1) }
-// DXIL: %"class.hlsl::RasterizerOrderedStructuredBuffer.12" = type { target("dx.RawBuffer", %struct.MyStruct = type { <4 x float>, <2 x i32>, [8 x i8] }, 1, 1) }
+// DXIL: %struct.MyStruct = type { <4 x float>, <2 x i32>, [8 x i8] }
RasterizerOrderedStructuredBuffer<int16_t> BufI16;
RasterizerOrderedStructuredBuffer<uint16_t> BufU16;
diff --git a/clang/test/CodeGenHLSL/builtins/hlsl_resource_t.hlsl b/clang/test/CodeGenHLSL/builtins/hlsl_resource_t.hlsl
index 7de62a363eedb5..fda034ce7f2034 100644
--- a/clang/test/CodeGenHLSL/builtins/hlsl_resource_t.hlsl
+++ b/clang/test/CodeGenHLSL/builtins/hlsl_resource_t.hlsl
@@ -3,7 +3,8 @@
using handle_float_t = __hlsl_resource_t [[hlsl::resource_class(UAV)]] [[hlsl::contained_type(float)]];
// CHECK: %"class.hlsl::RWBuffer" = type { target("dx.TypedBuffer", <4 x float>, 1, 0, 0)
-// CHECK: %"class.hlsl::StructuredBuffer" = type { target("dx.RawBuffer", %struct.MyStruct = type { <4 x float>, <2 x i32>, [8 x i8] }, 0, 0)
+// CHECK: %"class.hlsl::StructuredBuffer" = type { target("dx.RawBuffer", %struct.MyStruct, 0, 0)
+// CHECK: %struct.MyStruct = type { <4 x float>, <2 x i32>, [8 x i8] }
// CHECK: define void @_Z2faU9_Res_u_CTfu17__hlsl_resource_t(target("dx.TypedBuffer", float, 1, 0, 0) %a)
// CHECK: call void @_Z4foo1U9_Res_u_CTfu17__hlsl_resource_t(target("dx.TypedBuffer", float, 1, 0, 0) %0)
diff --git a/clang/test/CodeGenHLSL/resource-bindings.hlsl b/clang/test/CodeGenHLSL/resource-bindings.hlsl
index bfec90e1871f8b..d4e63082106538 100644
--- a/clang/test/CodeGenHLSL/resource-bindings.hlsl
+++ b/clang/test/CodeGenHLSL/resource-bindings.hlsl
@@ -15,5 +15,5 @@ struct S {
int i;
};
-// CHECK: %T3S0_h = call target("dx.RawBuffer", %struct.S = type { <4 x float>, i32, [12 x i8] }, 0, 0) @llvm.dx.handle.fromBinding.tdx.RawBuffer_s_struct.Ss_0_0t(i32 0, i32 3, i32 1, i32 0, i1 false)
+// CHECK: %T3S0_h = call target("dx.RawBuffer", %struct.S, 0, 0) @llvm.dx.handle.fromBinding.tdx.RawBuffer_s_struct.Ss_0_0t(i32 0, i32 3, i32 1, i32 0, i1 false)
StructuredBuffer<S> T3S0 : register(t3);
diff --git a/llvm/lib/IR/AsmWriter.cpp b/llvm/lib/IR/AsmWriter.cpp
index f8183774f4056d..a37a8901489cf7 100644
--- a/llvm/lib/IR/AsmWriter.cpp
+++ b/llvm/lib/IR/AsmWriter.cpp
@@ -649,8 +649,10 @@ void TypePrinting::print(Type *Ty, raw_ostream &OS) {
OS << "target(\"";
printEscapedString(Ty->getTargetExtName(), OS);
OS << "\"";
- for (Type *Inner : TETy->type_params())
- OS << ", " << *Inner;
+ for (Type *Inner : TETy->type_params()) {
+ OS << ", ";
+ Inner->print(OS, /*IsForDebug=*/false, /*NoDetails=*/true);
+ }
for (unsigned IntParam : TETy->int_params())
OS << ", " << IntParam;
OS << ")";
diff --git a/llvm/unittests/IR/TypesTest.cpp b/llvm/unittests/IR/TypesTest.cpp
index 855262fc4e787f..4436ed5118f4f2 100644
--- a/llvm/unittests/IR/TypesTest.cpp
+++ b/llvm/unittests/IR/TypesTest.cpp
@@ -40,10 +40,40 @@ TEST(TypesTest, TargetExtType) {
Type *A = TargetExtType::get(Context, "typea");
Type *Aparam = TargetExtType::get(Context, "typea", {}, {0, 1});
Type *Aparam2 = TargetExtType::get(Context, "typea", {}, {0, 1});
+
// Opaque types with same parameters are identical...
EXPECT_EQ(Aparam, Aparam2);
// ... but just having the same name is not enough.
EXPECT_NE(A, Aparam);
+
+ // ensure struct types in targest extension types
+ // only show the struct name, not the struct body
+ Type *Int32Type = Type::getInt32Ty(Context);
+ Type *FloatType = Type::getFloatTy(Context);
+ std::array<Type *, 2> Elements = {Int32Type, FloatType};
+
+ StructType *Struct = llvm::StructType::create(Context, Elements, "MyStruct",
+ /*isPacked=*/false);
+ SmallVector<char, 50> TETV;
+ llvm::raw_svector_ostream TETStream(TETV);
+ Type *TargetExtensionType =
+ TargetExtType::get(Context, "structTET", {Struct}, {0, 1});
+ TargetExtensionType->print(TETStream);
+
+ EXPECT_STREQ(TETStream.str().str().data(),
+ "target(\"structTET\", %MyStruct, 0, 1)");
+
+ // ensure that literal structs in the target extension type print the struct
+ // body
+ Struct = StructType::get(Context, Struct->elements(), /*isPacked=*/false);
+
+ TargetExtensionType =
+ TargetExtType::get(Context, "structTET", {Struct}, {0, 1});
+ TETV.clear();
+ TargetExtensionType->print(TETStream);
+
+ EXPECT_STREQ(TETStream.str().str().data(),
+ "target(\"structTET\", { i32, float }, 0, 1)");
}
TEST(TypedPointerType, PrintTest) {
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