[llvm] [AMDGPU][True16][CodeGen] build_vector pattern in true16 (PR #118904)

[Jay Foad via llvm-commits]

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@@ -3275,6 +3275,8 @@ def : GCNPat <
   (COPY_TO_REGCLASS SReg_32:$src0, SReg_32)
 >;
 
+foreach p = [NotHasTrue16BitInsts, UseFakeTrue16Insts] in
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jayfoad wrote:

OK. The point would be to simplify the generated instruction selector, since one pattern with a single (complex) predicate is better than two identical patterns with different (simple) predicates. But if it is temporary anyway then I guess that does not matter.

https://github.com/llvm/llvm-project/pull/118904