[llvm] IR: Allow vector type in atomic load and store (PR #117625)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 4 14:07:58 PST 2024
arsenm wrote:
> I agree with @jyknight that this needs to come with support for all targets, not just X86. Preferably implemented in a way that does not require defining a hook in every single backend.
Yes, the codegen patch should implement the generic path for all targets. But in terms of patch splitting, that shouldn't be in this PR
> We should always aspire to make generic IR constructs work target-independently. If we have fallen short of that in some area, that's not an excuse to repeat the mistake.
There are limits to what is practically implementable for operations that support arbitrary types. ppc_f128, x86_fp80, scalable vectors, and arbitrarily sized atomics are never going to be universally supported.
> So, I would strongly suggest that the first change be to unconditionally cast the vector to integers -- both in the base class TargetLoweringBase::shouldCastAtomicLoadInIR/shouldCastAtomicStoreInIR and in all the overrides (looks like 3 of those: NVPTX, AMDGPU, SystemZ).
We really should get rid of these hooks. There's no reason this can't just be handled by ordinary type legalization
https://github.com/llvm/llvm-project/pull/117625
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