[llvm] [RISCV] Fix the worst case for VSHA2MS in SiFive P400/P600 scheduling models (PR #116893)

[Reid Tatge via llvm-commits]

reidtatge wrote:

Yeah, agreed.

I spent just a very few minutes looking at it, and (not being an expert in
TableGen backends) it looks like SubtargetEmitter.cpp/findWriteResources is
just ignoring the situation, although it does look for aliased duplicates -
and aborts with a diagnostic - but doesn't explicitly look for duplicates
definitions (around line 925).
And CodeGenSchedModels::addProcResource() just quietly returns if its
already been seen for a given ProcModel.
And I may be missing something else...    FWIW :-)

-Reid

On Wed, Nov 20, 2024 at 9:10 AM Min-Yih Hsu ***@***.***>
wrote:

> We might also want to teach TableGen to warn or even throw an error on
> cases like this (i.e. duplicate WriteRes assignments)
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https://github.com/llvm/llvm-project/pull/116893