[llvm] [LLVM][AArch64] Add register classes for Armv9.6 assembly (PR #111717)

[via llvm-commits]

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@@ -45,6 +45,13 @@ static DecodeStatus DecodeSimpleRegisterClass(MCInst &Inst, unsigned RegNo,
 static DecodeStatus
 DecodeGPR64x8ClassRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address,
                                 const MCDisassembler *Decoder);
+template <unsigned Min, unsigned Max>
+static DecodeStatus DecodeZPRMul2_MinMax(MCInst &Inst, unsigned RegNo,
+                                         uint64_t Address,
+                                         const MCDisassembler *Decoder);
+static DecodeStatus DecodeZK(MCInst &Inst, unsigned RegNo, uint64_t Address,
+                             const MCDisassembler *Decoder);
+template <unsigned Min = 0, unsigned Max = 30>
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Lukacma wrote:

Removing the defaults, here and instead specifying the allowed range at the point of use might be safer and less error prone

https://github.com/llvm/llvm-project/pull/111717