[llvm] [RISCV][SiFive7] Change `Latency` of VCIX to the default (PR #106497)

Michal Terepeta via llvm-commits llvm-commits at lists.llvm.org
Thu Aug 29 22:26:43 PDT 2024


================
@@ -966,14 +966,14 @@ def : InstRW<[WriteIALU], (instrs COPY)>;
 // VCIX
 //
 // In principle we don't know the latency of any VCIX instructions. But instead
-// of taking the default of 1, which can lead to issues [1], we assume that they
-// have a fairly high latency.
+// of taking the default of 1, which can lead to issues [1], we use the default
+// latency provided by `SiFive7GetCyclesDefault`.
----------------
michalt wrote:

I expanded the comment a bit. Let me know if that's what you had in mind! 🙂 

https://github.com/llvm/llvm-project/pull/106497


More information about the llvm-commits mailing list