[llvm] [LLVM][AArch64] Improve big endian code generation for SVE BITCASTs. (PR #104769)
Paul Walker via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 19 10:17:45 PDT 2024
================
@@ -28877,7 +28885,20 @@ SDValue AArch64TargetLowering::getSVESafeBitCast(EVT VT, SDValue Op,
if (InVT != PackedInVT)
Op = DAG.getNode(AArch64ISD::REINTERPRET_CAST, DL, PackedInVT, Op);
- Op = DAG.getNode(ISD::BITCAST, DL, PackedVT, Op);
+ if (Subtarget->isLittleEndian() ||
+ PackedVT.getScalarSizeInBits() == PackedInVT.getScalarSizeInBits())
+ Op = DAG.getNode(ISD::BITCAST, DL, PackedVT, Op);
+ else {
+ EVT PackedVTAsInt = PackedVT.changeTypeToInteger();
+ EVT PackedInVTAsInt = PackedInVT.changeTypeToInteger();
+
+ // Simulate the effect of casting through memory.
+ Op = DAG.getNode(ISD::BITCAST, DL, PackedInVTAsInt, Op);
+ Op = DAG.getNode(ISD::BSWAP, DL, PackedInVTAsInt, Op);
----------------
paulwalker-arm wrote:
I wasn't planning to. The best big endian code generation is not the rational for the work. I'm fixing bugs with how we're using uzp, uupk{lo,hi} and zip instructions and the fixes keep tripping over `getSVESafeBitCast` and the current big endian support so it's just easier for me to move the support along a little to clear the path for what I really want to fix.
https://github.com/llvm/llvm-project/pull/104769
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