[llvm] [LLVM][AArch64] Improve big endian code generation for SVE BITCASTs. (PR #104769)
Paul Walker via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 19 10:17:45 PDT 2024
================
@@ -6140,6 +6140,8 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
break;
case ISD::BSWAP:
assert(VT.isInteger() && VT == N1.getValueType() && "Invalid BSWAP!");
+ if (VT.getScalarSizeInBits() == 8)
+ return N1;
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paulwalker-arm wrote:
I was just trying to have a single check here rather than at all the call sites. I'll move it back.
https://github.com/llvm/llvm-project/pull/104769
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