[llvm] [AArch64] Lower for power of 2 signed divides with scalar type (PR #97879)

[David Sherwood via llvm-commits]

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@@ -383,4 +383,19 @@ define void @sdiv_v32i64(ptr %a) vscale_range(16,0) #0 {
   ret void
 }
 
+define i32 @sdiv_int(i32 %begin, i32 %first) #0 {
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david-arm wrote:

This test isn't actually testing fixed-length vector code so I think a more appropriate place for the test would be something like `llvm/test/CodeGen/AArch64/sdivpow2.ll` where we test the scalar optimisation. Also, I think the test can be made simpler, i.e. something like

```
define i32 @test9(i32 %x) #0 {
  %div = sdiv i32 %x, 8
  ret i32 %div
}

attributes #0 = { "target-features"="+sve" vscale_range(2,2) }
```

https://github.com/llvm/llvm-project/pull/97879