[llvm] [RISCV] Support postRA vsetvl insertion pass (PR #70549)

[Piyou Chen via llvm-commits]

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@@ -223,16 +223,16 @@ declare <vscale x 32 x half> @llvm.vp.ceil.nxv32f16(<vscale x 32 x half>, <vscal
 define <vscale x 32 x half> @vp_ceil_vv_nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x i1> %m, i32 zeroext %evl) {
 ; CHECK-LABEL: vp_ceil_vv_nxv32f16:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    vmv1r.v v16, v0
 ; CHECK-NEXT:    lui a1, %hi(.LCPI10_0)
 ; CHECK-NEXT:    flh fa5, %lo(.LCPI10_0)(a1)
+; CHECK-NEXT:    vmv1r.v v16, v0
----------------
BeMg wrote:

During the instruction selection, compiler will emit the `$v0 = COPY %1:vr` for each RVV mask instruction. These COPY will be eliminated after Machine Copy Propagation Pass, but `$v16 = COPY $v0` can't be eliminated due to `PseudoVMFLT_VFPR16_M8_MASK` early-clobber flag.

Could `PseudoVMFLT_VFPR16_M8_MASK` accept `$v0` as the destination register, or is there another chance to remove that COPY? 

```
; After Instruction Selection
bb.0 (%ir-block.0):
  liveins: $v8m8, $v0, $x10
  %2:gprnox0 = COPY $x10
  %1:vr = COPY $v0
  %0:vrm8 = COPY $v8m8
  %3:vrm8 = COPY %0:vrm8
  $v0 = COPY %1:vr
  %4:vrm8nov0 = PseudoVFSGNJX_VV_M8_E16_MASK $noreg(tied-def 0), %3:vrm8, %3:vrm8, $v0, %2:gprnox0, 4, 3
  %5:gpr = LUI target-flags(riscv-hi) %const.0
  %6:fpr16 = FLH killed %5:gpr, target-flags(riscv-lo) %const.0 :: (load (s16) from constant-pool)
  $v0 = COPY %1:vr
  early-clobber %7:vr = nofpexcept PseudoVMFLT_VFPR16_M8_MASK %1:vr(tied-def 0), killed %4:vrm8nov0, killed %6:fpr16, $v0, %2:gprnox0, 4
...
```
```
; After Machine Copy Propagation Pass
bb.0 (%ir-block.0):
  liveins: $v0, $x10, $v8m8
  renamable $x11 = LUI target-flags(riscv-hi) %const.0
  renamable $f15_h = FLH killed renamable $x11, target-flags(riscv-lo) %const.0 :: (load (s16) from constant-pool)
  renamable $v16 = COPY $v0
  dead $x0 = PseudoVSETVLI killed renamable $x10, 203, implicit-def $vl, implicit-def $vtype
  renamable $v24m8 = PseudoVFSGNJX_VV_M8_E16_MASK undef renamable $v24m8(tied-def 0), renamable $v8m8, renamable $v8m8, $v0, $noreg, 4, 3, implicit $vl, implicit $vtype
  dead $x0 = PseudoVSETVLIX0 killed $x0, 75, implicit-def $vl, implicit-def $vtype, implicit $vl
  early-clobber renamable $v16 = nofpexcept PseudoVMFLT_VFPR16_M8_MASK killed renamable $v16(tied-def 0), killed renamable $v24m8, killed renamable $f15_h, $v0, $noreg, 4, implicit $vl, implicit $vtype
...
```

https://github.com/llvm/llvm-project/pull/70549