[llvm] [RISCV][ISel] Eliminate `andi rd, rs1, -1` instructions (PR #89976)

[Craig Topper via llvm-commits]

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@@ -670,7 +669,6 @@ define i64 @zext_mul21474836480(i32 signext %a) {
 ;
 ; RV64ZBA-LABEL: zext_mul21474836480:
 ; RV64ZBA:       # %bb.0:
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topperc wrote:

I guess the FIXME above this function can be removed now?

https://github.com/llvm/llvm-project/pull/89976