[llvm] [RISCV] Codegen support for XCVbi extension (PR #89719)

[Craig Topper via llvm-commits]

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@@ -18035,6 +18053,7 @@ RISCVTargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
            "ReadCounterWide is only to be used on riscv32");
     return emitReadCounterWidePseudo(MI, BB);
   case RISCV::Select_GPR_Using_CC_GPR:
+  case RISCV::Select_IMM_Using_CC_GPR:
   case RISCV::Select_FPR16_Using_CC_GPR:
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topperc wrote:

Don't we need versions of all of these opcodes with an immediate condition? When you created RISCVISD::SELECTIMM_CC, you didn't check that the result type was integer so FP is possible.

https://github.com/llvm/llvm-project/pull/89719