[llvm] [RISCV][GlobalISel] Fix selectShiftMask when shift mask is created from G_AND (PR #89602)

[Hongbin Jin via llvm-commits]

bvlgah wrote:

Hi. I have been working on make RISC-V's global instruction selection usable and performant.
This patch is intended to fix one of issues encountered in the LLVM test suite. Before the patch,
the following gMIR

```
    %0:gprb(s64) = COPY $x10
    %1:gprb(s64) = COPY $x11
    %2:gprb(s32) = G_CONSTANT i32 15
    %3:gprb(s32) = G_TRUNC %0(s64)
    %4:gprb(s32) = G_AND %3, %2
    %5:gprb(s64) = nneg G_ZEXT %4(s32)
    %6:gprb(s64) = G_LSHR %1, %5(s64)
```

is lowered to something like

```
    %0:gpr = COPY $x10
    %1:gpr = COPY $x11
    %6:gpr = SRL %1, %0
```

This is incorrect because the the following condition always evaluates to true.

https://github.com/llvm/llvm-project/blob/f0cbdd3e352a1d45965be686f48eee51159bb218/llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp#L187-L188

https://github.com/llvm/llvm-project/pull/89602