[clang] [llvm] [RISCV] Add processor definition for XiangShan-KunMingHu (PR #89359)
Yingwei Zheng via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 22 01:41:29 PDT 2024
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@@ -378,3 +378,30 @@ def XIANGSHAN_NANHU : RISCVProcessorModel<"xiangshan-nanhu",
TuneZExtHFusion,
TuneZExtWFusion,
TuneShiftedZExtWFusion]>;
+def XIANGSHAN_KUNMINGHU : RISCVProcessorModel<"xiangshan-kunminghu",
+ NoSchedModel,
+ [Feature64Bit,
+ FeatureStdExtI,
+ FeatureStdExtZicsr,
+ FeatureStdExtZifencei,
+ FeatureStdExtM,
+ FeatureStdExtA,
+ FeatureStdExtF,
+ FeatureStdExtD,
+ FeatureStdExtC,
+ FeatureStdExtZba,
+ FeatureStdExtZbb,
+ FeatureStdExtZbc,
+ FeatureStdExtZbs,
+ FeatureStdExtZkn,
+ FeatureStdExtZksed,
+ FeatureStdExtZksh,
+ FeatureStdExtSvinval,
+ FeatureStdExtZicbom,
+ FeatureStdExtZicboz,
+ FeatureStdExtV,
+ FeatureStdExtZvl128b],
+ [TuneNoDefaultUnroll,
----------------
dtcxzyw wrote:
Can you provide some performance data about these options?
IIRC KunMingHu core supports the `lui + addi` fusion.
https://github.com/llvm/llvm-project/pull/89359
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