[llvm] [Target][RISCV] Add HwMode support to subregister index size/offset. (PR #86368)

[Björn Pettersson via llvm-commits]

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@@ -83,10 +83,24 @@ class RegInfoByHwMode<list<HwMode> Ms = [], list<RegInfo> Ts = []>
   list<RegInfo> Objects = Ts;
 }
 
+class SubRegRange<int size, int offset = 0> {
+  int Size = size;      // Sub register size in bits.
+  int Offset = offset;  // Offset of the first bit of the sub-reg index.
+}
+
+class SubRegRangeByHwMode<list<HwMode> Ms = [], list<SubRegRange> Ts = []>
+    : HwModeSelect<Ms> {
+  // The length of this list must be the same as the length of Ms.
+  list<SubRegRange> Objects = Ts;
+}
+
 // SubRegIndex - Use instances of SubRegIndex to identify subregisters.
 class SubRegIndex<int size, int offset = 0> {
   string Namespace = "";
 
+  // The size/offset information, parameterized by a HW mode.
+  SubRegRangeByHwMode SubRegRanges;
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bjope wrote:

Ok. Right. I did not  remember how that worked.

Now, if I got it right, if you specify the SubRegRanges that includes a "DefaultMode" entry, then the extra Size/Offset fields aren't used at all. If "DefaultMode" isn't found in SubRegRanges, or if there is no SubRegRanges specified, then the legacy Size/Offset fields are used as the default mode.

That seems fine. Maybe it should be described in some comment. to make it easier for new backends to understand when to use the different fields?

https://github.com/llvm/llvm-project/pull/86368